ATMEGA128RZAV-8MU Atmel, ATMEGA128RZAV-8MU Datasheet - Page 187
ATMEGA128RZAV-8MU
Manufacturer Part Number
ATMEGA128RZAV-8MU
Description
MCU ATMEGA1281/AT86RF230 64-QFN
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA640V-8CU.pdf
(38 pages)
2.ATMEGA640V-8CU.pdf
(444 pages)
3.AT86RF230-ZU.pdf
(98 pages)
Specifications of ATMEGA128RZAV-8MU
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
64-QFN
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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19.10 Register Description
19.10.1
2549M–AVR–09/10
TCCR2A –Timer/Counter Control Register A
• Bits 7:6 – COM2A1:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC2A) behavior. If one or both of the COM2A1:0
bits are set, the OC2A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2A pin
must be set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 19-2.
Table 19-3
mode.
Table 19-3.
Note:
Table 19-4 on page 188
to phase correct PWM mode.
Bit
(0xB0)
Read/Write
Initial Value
COM2A1
COM2A1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 178
shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
COM2A1
R/W
COM2A0
COM2A0
7
0
for more details.
0
1
0
1
0
1
0
1
Table 19-2
COM2A0
shows the COM2A1:0 bit functionality when the WGM22:0 bits are set
R/W
6
0
ATmega640/1280/1281/2560/2561
shows the COM2A1:0 bit functionality when the WGM22:0 bits
COM2B1
R/W
WGM22 = 0: Normal Port Operation, OC2A Disconnected.
5
0
Clear OC2A on Compare Match, set OC2A at BOTTOM
Set OC2A on Compare Match, clear OC2A at BOTTOM
WGM22 = 1: Toggle OC2A on Compare Match.
Normal port operation, OC2A disconnected.
Normal port operation, OC2A disconnected.
COM2B0
R/W
4
0
Toggle OC2A on Compare Match.
Clear OC2A on Compare Match.
Set OC2A on Compare Match.
(non-inverting mode).
(inverting mode).
R
3
–
0
(1)
Description
Description
R
2
0
–
WGM21
R/W
1
0
“Fast PWM Mode” on
WGM20
R/W
0
0
TCCR2A
187
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