ATMEGA128RZAV-8MU Atmel, ATMEGA128RZAV-8MU Datasheet - Page 157

MCU ATMEGA1281/AT86RF230 64-QFN

ATMEGA128RZAV-8MU

Manufacturer Part Number
ATMEGA128RZAV-8MU
Description
MCU ATMEGA1281/AT86RF230 64-QFN
Manufacturer
Atmel
Series
ATMEGAr
Datasheets

Specifications of ATMEGA128RZAV-8MU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
64-QFN
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
2549M–AVR–09/10
Figure 16-12
frequency correct PWM mode the OCRnx Register is updated at BOTTOM. The timing diagrams
will be the same, but TOP should be replaced by BOTTOM, TOP-1 by BOTTOM+1 and so on.
The same renaming applies for modes that set the TOVn Flag at BOTTOM.
Figure 16-12. Timer/Counter Timing Diagram, no Prescaling
Figure 16-13
Figure 16-13. Timer/Counter Timing Diagram, with Prescaler (f
(PC and PFC PWM)
and ICF n
and ICFn
(CTC and FPWM)
TOVn
(Update at TOP)
(PC and PFC PWM)
TOVn
(CTC and FPWM)
(Update at TOP)
TCNTn
TCNTn
OCRnx
as TOP)
(clk
TCNTn
TCNTn
OCRnx
(clk
as TOP)
clk
clk
clk
clk
I/O
I/O
shows the count sequence close to TOP in various modes. When using phase and
shows the same timing data, but with the prescaler enabled.
(FPWM)
(FPWM)
I/O
Tn
I/O
Tn
/8)
/1)
(if used
(if used
TOP - 1
TOP - 1
TOP - 1
TOP - 1
Old OCRnx Value
ATmega640/1280/1281/2560/2561
Old OCRnx Value
TOP
TOP
TOP
TOP
BOTTOM
BOTTOM
TOP - 1
TOP - 1
clk_I/O
New OCRnx Value
New OCRnx Value
/8)
BOTTOM + 1
BOTTOM + 1
TOP - 2
TOP - 2
157

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