ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 280

IC AVR MCU 2.4GHZ XCEIVER 64QFN

ATMEGA128RFA1-ZU

Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr

Specifications of ATMEGA128RFA1-ZU

Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Performing Page
Erase by SPM
Filling the Temporary
Buffer (Page Loading)
Performing a Page
Write
Using the SPM
Interrupt
Consideration While
Updating BLS
Prevent Reading the
RWW Section During
Self-Programming
280
ATmega128
To execute page erase, set up the address in the Z-pointer and RAMPZ, write “X0000011” to
SPMCSR and execute SPM within four clock cycles after writing SPMCSR. The data in R1 and
R0 is ignored. The page address must be written to PCPAGE in the Z-register. Other bits in the
Z-pointer must be written zero during this operation.
To write an instruction word, set up the address in the Z-pointer and data in R1:R0, write
“00000001” to SPMCSR and execute SPM within four clock cycles after writing SPMCSR. The
content of PCWORD in the Z-register is used to address the data in the temporary buffer. The
temporary buffer will auto-erase after a page write operation or by writing the RWWSRE bit in
SPMCSR. It is also erased after a System Reset. Note that it is not possible to write more than
one time to each address without erasing the temporary buffer.
Note:
To execute page write, set up the address in the Z-pointer and RAMPZ, write “X0000101” to
SPMCSR and execute SPM within four clock cycles after writing SPMCSR. The data in R1 and
R0 is ignored. The page address must be written to PCPAGE. Other bits in the Z-pointer must
be written zero during this operation.
If the SPM interrupt is enabled, the SPM interrupt will generate a constant interrupt when the
SPMEN bit in SPMCSR is cleared. This means that the interrupt can be used instead of polling
the SPMCSR Register in software. When using the SPM interrupt, the interrupt vectors should
be moved to the BLS section to avoid that an interrupt is accessing the RWW section when it is
blocked for reading. How to move the interrupts is described in
Special care must be taken if the user allows the Boot Loader section to be updated by leaving
Boot Lock bit11 unprogrammed. An accidental write to the Boot Loader itself can corrupt the
entire Boot Loader, and further software updates might be impossible. If it is not necessary to
change the Boot Loader software itself, it is recommended to program the Boot Lock bit11 to
protect the Boot Loader software from any internal software changes.
During Self-Programming (either page erase or page write), the RWW section is always blocked
for reading. The user software itself must prevent that this section is addressed during the Self-
Programming operation. The RWWSB in the SPMCSR will be set as long as the RWW section is
busy. During Self-Programming the interrupt vector table should be moved to the BLS as
described in
RWW section after the programming is completed, the user software must clear the RWWSB by
writing the RWWSRE. See
an example.
Page Erase to the RWW section: The NRWW section can be read during the page erase.
Page Erase to the NRWW section: The CPU is halted during the operation.
Page Write to the RWW section: The NRWW section can be read during the page write.
Page Write to the NRWW section: The CPU is halted during the operation.
If the EEPROM is written in the middle of an SPM Page Load operation, all data loaded will be
lost.
“Interrupts” on page
“Simple Assembly Code Example for a Boot Loader” on page 282
59, or the interrupts must be disabled. Before addressing the
“Interrupts” on page
2467V–AVR–02/11
59.
for

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