SI4330-B1-FMR Silicon Laboratories Inc, SI4330-B1-FMR Datasheet - Page 38
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SI4330-B1-FMR
Manufacturer Part Number
SI4330-B1-FMR
Description
IC RX ISM 240-960MHZ 20VQFN
Manufacturer
Silicon Laboratories Inc
Specifications of SI4330-B1-FMR
Frequency
240MHz ~ 960MHz
Sensitivity
-121dBm
Data Rate - Maximum
256 kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
Remote Control, RKE, Security Systems
Current - Receiving
18.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4330-B1-FMR
Manufacturer:
HIROSE
Quantity:
3 200
Part Number:
SI4330-B1-FMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Si4330-B1
initiated. The timeout period after preamble detections is defined as the value programmed into the sync word
length plus four additional bits.
6.9. Receive Header Check
The header check is designed to support 1–4 bytes and broadcast headers. The header length needs to be set in
register 33h, hdlen[2:0]. The headers to be checked need to be set in register 32h, hdch[3:0]. For instance, there
can be four bytes of header in the packet structure but only one byte of the header is set to be checked (i.e.,
header 3). For the headers that are set to be checked, the expected value of the header should be programmed in
chhd[31:0] in Registers 3F–42. The individual bits within the selected bytes to be checked can be enabled or
disabled with the header enables, hden[31:0] in Registers 43–46. For example, if you want to check all bits in
header 3 then hden[31:24] should be set to FF but if only the last 4 bits are desired to be checked then it should be
set to 00001111 (0F). Broadcast headers can also be programmed by setting bcen[3:0] in Register 32h. For
broadcast header check the value may be either “FFh” or the value stored in the Check Header register. A logic
equivalent of the header check for Header 3 is shown in Figure 17. A similar logic check will be done for Header 2,
Header 1, and Header 0 if enabled.
38
hden[31:24]
chhd[31:24]
rxhd[31:24]
rxhd[31:24]
FFh
WISE
WISE
Equivalence
comparison
BIT
BIT
=
Example for Header 3
bcen[3]
Figure 17. Header
hdch[3]
Rev 1.0
Equivalence
comparison
=
header3_ok