SI4330-B1-FMR Silicon Laboratories Inc, SI4330-B1-FMR Datasheet
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SI4330-B1-FMR
Manufacturer Part Number
SI4330-B1-FMR
Description
IC RX ISM 240-960MHZ 20VQFN
Manufacturer
Silicon Laboratories Inc
Specifications of SI4330-B1-FMR
Frequency
240MHz ~ 960MHz
Sensitivity
-121dBm
Data Rate - Maximum
256 kbps
Modulation Or Protocol
FSK, GFSK, OOK
Applications
Remote Control, RKE, Security Systems
Current - Receiving
18.5mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Features
RSSI Equipped
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4330-B1-FMR
Manufacturer:
HIROSE
Quantity:
3 200
Part Number:
SI4330-B1-FMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Description
Silicon Laboratories’ Si4330 is a highly-integrated, single chip,
wireless ISM receiver that is part of the EZRadioPRO™ family.
The EZRadioPRO family includes a complete line of transmitters,
receivers, and transceivers that allow RF system designers to
choose the optimal wireless part for their application.
The Si4330 offers advanced radio features, including continuous
frequency coverage from 240–960 MHz. The Si4330’s high level
of integration offers reduced BOM cost while simplifying overall
system design. The extremely low receive sensitivity (–118 dBm)
ensures extended range and improved link performance. Built-in
antenna diversity and support for frequency hopping can be used
to further extend range and enhance performance. Antenna
diversity is completely integrated into the Si4330 and can improve
the system link budget by 8–10 dB, resulting in substantial range
increases under adverse environmental conditions.
Additional system features, such as an automatic wake-up timer,
low battery detector, 64-byte RX FIFO, automatic packet handling,
and preamble detection, reduce overall current consumption and
allow the use of lower-cost system MCUs. An integrated
temperature sensor, general purpose ADC, power-on-reset
(POR), and GPIOs further reduce overall system cost and size.
The Si4330 receiver uses a single-conversion architecture to
convert the 2-level FSK/GFSK/OOK modulated receive signal to a
low IF frequency. Following a programmable gain amplifier (PGA),
the signal is converted to the digital domain by a high-performance
delta-sigma ADC allowing filtering, demodulation, slicing, error
correction, and packet handling to be performed in the built-in
DSP, thus increasing the receiver’s performance and flexibility
versus analog-based architectures. The demodulated signal is
then output to the system MCU through a programmable GPIO or
via the standard SPI bus by reading the 64-byte RX FIFO. This
digital architecture simplifies system design while allowing for the
use of lower-end MCUs. The Si4330 is designed to work with an
MCU, crystal, and a few passives to create a very low-cost
system. Voltage regulators are integrated on-chip, which allows for
a wide range of operating supply voltage conditions from +1.8 to
+3.6 V.
EZRadioPRO
RFp
RFn
VDD_RF
VR_IF
IF LDO
RF LDO
Mixers
Copyright © 2009 by Silicon Laboratories
AGC Control
VCO LDO
VCO
PGA
LPF
ADC
Features
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Applications
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PLL LDO
Frequency Range = 240–960 MHz
FSK, GFSK, and OOK modulation
Sensitivity = –118 dBm
Low Power Consumption
Data Rate = 1 to 128 kbps
Power Supply = 1.8 to 3.6 V
Ultra low power shutdown mode (10 nA)
Wake-up timer
Auto-frequency calibration (AFC)
Programmable RX BW 2.6–620 kHz
Programmable packet handler
Programmable GPIOs
Embedded antenna diversity algorithm
RX 64 byte FIFO
Low battery detector
Temperature sensor and 8-bit ADC
Frequency hopping capability
On-chip crystal tuning
20-Pin QFN package
Low BOM
Remote control
Home security & alarm
Telemetry
Toy control
Tire Pressure monitoring
Remote meter reading
Remote keyless entry
Home automation
Industrial control
Sensor networks
Health monitors
Tag readers
CP
N
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18.5 mA receive
ANTDIV
RC 32K OSC
PFD
SPI, & Controller
Digital Logic
Digital Modem
30M XTAL
OSC
Digital LDO
Low Power
Digital LDO
VDD_DIG
Sensor
Temp
POR
SCLK
LBD
ADC
8Bit
SDO
SDI
ISM Receiver
Si4330
2.20.09
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SI4330-B1-FMR Summary of contents
Page 1
... SPI bus by reading the 64-byte RX FIFO. This digital architecture simplifies system design while allowing for the use of lower-end MCUs. The Si4330 is designed to work with an MCU, crystal, and a few passives to create a very low-cost system. Voltage regulators are integrated on-chip, which allows for a wide range of operating supply voltage conditions from +1 ...
Page 2
... Desired Ref Signal 3 dB above sensi- BLOCK tivity. Interferer and desired modulated BLOCK with 40 kbps kHz GFSK with BT = 0.5 BLOCK Im IF=937 kHz REJ T A 20-pin QFN Package Information Copyright © 2009 by Silicon Laboratories Si4330 ISM Receiver Min Typ Max Unit 1.8 3.0 3.6 V — 10 — nA — ...