AD8343ARU-REEL Analog Devices Inc, AD8343ARU-REEL Datasheet

IC MIXER ACTIVE HI-IP3 14-TSSOP

AD8343ARU-REEL

Manufacturer Part Number
AD8343ARU-REEL
Description
IC MIXER ACTIVE HI-IP3 14-TSSOP
Manufacturer
Analog Devices Inc
Series
AD8343r
Datasheet

Specifications of AD8343ARU-REEL

Rohs Status
RoHS non-compliant
Rf Type
Cellular, WLAN
Frequency
0Hz ~ 2.5GHz
Number Of Mixers
1
Gain
7dB
Noise Figure
14dB
Secondary Attributes
Up/Down Converter
Current - Supply
60mA
Voltage - Supply
4.5 V ~ 5.5 V
Package / Case
14-TSSOP (0.173", 4.40mm Width)
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD8343ARU-REEL7
Manufacturer:
ADI
Quantity:
8 000
FEATURES
High-performance active mixer
Broadband operation to 2.5 GHz
Conversion gain: 7 dB
Input IP3: 16.5 dBm
LO drive: –10 dBm
Noise figure: 14 dB
Input P
Differential LO, IF and RF Ports
50 Ω LO input impedance
Single-supply operation: 5 V @ 50 mA typical
Power-down mode @ 20 μA typical
APPLICATIONS
Cellular base stations
Wireless LAN
Satellite converters
SONET/SDH radio
Radio links
RF instrumentation
GENERAL DESCRIPTION
The AD8343 is a high-performance broadband active mixer.
With wide bandwidth on all ports and very low intermodula-
tion distortion, the AD8343 is well suited for demanding
transmit applications or receive channel applications.
The AD8343 provides a typical conversion gain of 7 dB. The
integrated LO driver supports a 50 Ω differential input imped-
ance with low LO drive level, helping to minimize external
component count.
The open-emitter differential inputs can be interfaced directly
to a differential filter or driven through a balun (transformer)
to provide a balanced drive from a single-ended source.
The open-collector differential outputs can be used to drive a
differential IF signal interface or convert to a single-ended signal
through the use of a matching network or transformer. When
centered on the VPOS supply voltage, the outputs swing ±1 V.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
1dB
: 2.8 dBm
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
The LO driver circuitry typically consumes 15 mA of current.
Two external resistors are used to set the mixer core current for
required performance, resulting in a total current of 20 mA to
60 mA. This corresponds to power consumption of 100 mW to
300 mW with a single 5 V supply.
The AD8343 is fabricated on Analog Devices, Inc. ’ s high-
performance 25 GHz silicon bipolar IC process. The AD8343 is
available in a 14-lead TSSOP package. It operates over a −40°C
to +85°C temperature range. A device-populated evaluation
board is available.
FUNCTIONAL BLOCK DIAGRAM
COMM
COMM
PWDN
VPOS
DCPL
INPM
INPP
High IP3 Active Mixer
1
2
3
4
5
6
7
©2006 Analog Devices, Inc. All rights reserved.
BIAS
AD8343
Figure 1.
DC-to-2.5 GHz
14
13
12
11
10
9
8
COMM
OUTP
OUTM
COMM
LOIP
LOIM
COMM
AD8343
www.analog.com

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AD8343ARU-REEL Summary of contents

Page 1

FEATURES High-performance active mixer Broadband operation to 2.5 GHz Conversion gain Input IP3: 16.5 dBm LO drive: –10 dBm Noise figure Input P : 2.8 dBm 1dB Differential LO, IF and RF Ports 50 Ω LO ...

Page 2

AD8343 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Basic Operating Instructions ...................................................... 3 Typical AC Performance.............................................................. 4 Typical Isolation Performance .................................................... 4 Absolute Maximum ...

Page 3

SPECIFICATIONS BASIC OPERATING INSTRUCTIONS 25°C, unless otherwise noted Table 1. Parameter INPUT INTERFACE (INPP, INPM) Differential Open Emitter DC Bias Voltage Operating Current Each Input ( Value of Bias ...

Page 4

AD8343 TYPICAL AC PERFORMANCE 25°C; see Figure 72, Table 6 through Table Table 2. Input Frequency (MHz) Output Frequency (MHz) RECEIVER CHARACTERISTICS 400 70 900 170 1900 170 2400 170 2400 ...

Page 5

ABSOLUTE MAXIMUM RATINGS Table 4. Parameter VPOS Quiescent Voltage OUTP, OUTM Quiescent Voltage INPP, INPM Voltage Differential (Either Polarity) LOIP, LOIM Current (Injection or Extraction) LOIP, LOIM Voltage Differential (Either Polarity) 1 Internal Power Dissipation (TSSOP) θ (TSSOP) JA Maximum ...

Page 6

AD8343 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Description 11, 14 COMM Connect to low impedance circuit ground. 2 INPP Differential Input Pin. This pin needs to be dc-biased and typically ...

Page 7

SIMPLIFIED INTERFACE SCHEMATICS OUTP OUTM VPOS VPOS 1. INPP INPM 1.2V DC Figure 3. Input and Output Ports VPOS 5V DC 360mV DC LOIP LOIM 360mV DC Figure 4. LO Port LOIP ...

Page 8

AD8343 TYPICAL PERFORMANCE CHARACTERISTICS RECEIVER CHARACTERISTICS f = 400 MHz MHz 330 MHz, see Figure 72, Table 6, and Table 8. IN OUT 5.37 5.42 5.47 5.52 ...

Page 9

MHz 170 MHz 730 MHz, see Figure 72, Table 6, and Table 8. IN OUT 3.40 3.45 3.50 3.55 3.60 3.65 CONVERSION GAIN (dB) ...

Page 10

AD8343 f = 1900 MHz 170 MHz 1730 MHz, see Figure 72, Table 6, and Table 8. IN OUT MEAN: 7.09dB ...

Page 11

MHz 170 MHz 2230 MHz, see Figure 72, Table 6, and Table 8. IN OUT LO 40 MEAN: 6.79dB 5.8 6.0 6.2 6.4 6.6 6.8 ...

Page 12

AD8343 f = 2400 MHz 425 MHz 1975 MHz, see Figure 72, Table 6, and Table 8. IN OUT 4.2 4.4 4.6 ...

Page 13

TRANSMIT CHARACTERISTICS f = 150 MHz 900 MHz 750 MHz, see Figure 72, Table 6, and Table 7. IN OUT 7.20 7.25 7.30 7.35 7.40 7.45 7.50 ...

Page 14

AD8343 f = 150 MHz 1900 MHz 1750 MHz, see Figure 72, Table 6, and Table 7. IN OUT –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 ...

Page 15

CIRCUIT DESCRIPTION The AD8343 is a mixer intended for high-intercept applications. The signal paths are entirely differential and dc-coupled to permit high-performance operation over a broad range of frequencies; the block diagram (see Figure 1) shows the basic functional blocks. ...

Page 16

AD8343 DC INTERFACES BIASING AND DECOUPLING (VPOS, DCPL) VPOS is the power supply connection for the internal bias circuit and the LO driver. Bypass this pin closely to GND with a capacitor in the range of 0.01 μF to 0.1 ...

Page 17

AC INTERFACES Because of the AD8343’s wideband design, there are several points to consider in its ac implementation; the basic ac signal connection diagram shown in Figure 55 summarizes these points. The input signal undergoes a single-ended to differential conversion ...

Page 18

AD8343 INPUT INTERFACE (INPP AND INPM) SINGLE-ENDED-TO-DIFFERENTIAL CONVERSION The AD8343 is designed to accept differential input signals for best performance. While a single-ended input can be applied, the signal capacity is reduced by 6 dB. Furthermore, there is no cancellation ...

Page 19

At frequencies above 1 GHz, the real part of the input impedance rises markedly and it becomes more attractive to use a 1:1 balun and rely on the L network for the entire impedance transformation. In order to ...

Page 20

AD8343 OUTPUT INTERFACE (OUTP, OUTM) The output of the AD8343 comprises a balanced pair of open collector outputs. These should be biased to about the same voltage as is connected to VPOS. Connecting them to an appre- ciably higher voltage ...

Page 21

INPUT AND OUTPUT STABILITY CONSIDERATIONS The differential configuration of the input and output ports of the AD8343 raises the need to consider both differential and common-mode RF stability of the device. Throughout the following stability discussion, common mode is used ...

Page 22

AD8343 For the device input, capacitive common-mode loading tends to produce an unstable circuit, particularly at low frequencies (see Figure 61). Fortunately, either type of single-ended-to-differential conversion (transmission line balun or flux-coupled transformer) tends to produce inductive loading, although some ...

Page 23

A STEP-BY-STEP APPROACH TO IMPEDANCE MATCHING The following discussion addresses, in detail, the matter of establishing a differential impedance match to the AD8343. This section specifically deals with the input match, and the use of Side A of the evaluation ...

Page 24

AD8343 1 2.9pF SHUNT CAPACITOR 2 0.2 0.5 1.0 Figure 67. Theoretical Design of Matching Network This theoretical design is important because it establishes the basic topology and the initial matching value for the network. The theoretical value of 2.9 ...

Page 25

If the result is not as expected, the balun is probably producing an unexpected impedance transformation. If the performance is extremely far from the desired result and it was assumed that the output impedance of the balun was 50 Ω, ...

Page 26

AD8343 APPLICATIONS DOWNCONVERTING MIXER A typical downconversion application is shown in Figure 69 with the AD8343 connected as a receive mixer. The input single-ended-to-differential conversion is obtained through the use of a 1:1 transmission line balun. The input matching network ...

Page 27

EVALUATION BOARD The AD8343 evaluation board has two independent areas, denoted A and B. The circuit schematics are shown in Figure 71 and Figure 72. An assembly drawing is included in Figure 73 to ease identification of components, and representations ...

Page 28

AD8343 Table 8. Values of Matching Components Used for Receiver Characterization Component Designator f = 400 MHz MHz IN OUT T1B, T2B T3B R6B, R7B Z1B, Z3B Z2B Z5B, Z7B Z6B L1B, L2B Z4B, Z8B, L3B, L4B, ...

Page 29

VPOS_A R1A C1A GND_A PWDN_1_A C5A Z1A R6A INPUT_P_A Z2A Z4A R7A INPUT_M_A Z3A C6A L1A R3A PWDN_A NOTES 1. REFERENCE TABLE 6 FOR COMPONENT VALUES AS SHIPPED. 2. REFERENCE TABLE 6, 7, AND 8 FOR CHARACTERIZATION VALUES. Figure 71. ...

Page 30

AD8343 Figure 74. Evaluation Board Artwork Top Figure 75. Evaluation Board Artwork Internal 1 Rev Page ...

Page 31

Figure 76. Evaluation Board Artwork Internal 2 Figure 77. Evaluation Board Artwork Bottom Rev Page AD8343 ...

Page 32

... OUTLINE DIMENSIONS 1.05 1.00 0.80 ORDERING GUIDE Model Temperature Range AD8343ARU –40°C to +85°C AD8343ARU-REEL –40°C to +85°C AD8343ARU-REEL7 –40°C to +85°C 1 AD8343ARUZ –40°C to +85°C 1 AD8343ARUZ-REEL –40°C to +85°C 1 AD8343ARUZ-REEL7 –40°C to +85°C AD8343-EVAL ...

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