ad8343-evalz Analog Devices, Inc., ad8343-evalz Datasheet

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ad8343-evalz

Manufacturer Part Number
ad8343-evalz
Description
Dc-to-2.5 Ghz High Ip3 Active Mixer
Manufacturer
Analog Devices, Inc.
Datasheet
FEATURES
High-performance active mixer
Broadband operation to 2.5 GHz
Conversion gain: 7 dB
Input IP3: 16.5 dBm
LO drive: –10 dBm
Noise figure: 14 dB
Input P
Differential LO, IF and RF Ports
50 Ω LO input impedance
Single-supply operation: 5 V @ 50 mA typical
Power-down mode @ 20 μA typical
APPLICATIONS
Cellular base stations
Wireless LAN
Satellite converters
SONET/SDH radio
Radio links
RF instrumentation
GENERAL DESCRIPTION
The AD8343 is a high-performance broadband active mixer.
With wide bandwidth on all ports and very low intermodula-
tion distortion, the AD8343 is well suited for demanding
transmit applications or receive channel applications.
The AD8343 provides a typical conversion gain of 7 dB. The
integrated LO driver supports a 50 Ω differential input imped-
ance with low LO drive level, helping to minimize external
component count.
The open-emitter differential inputs can be interfaced directly
to a differential filter or driven through a balun (transformer)
to provide a balanced drive from a single-ended source.
The open-collector differential outputs can be used to drive a
differential IF signal interface or convert to a single-ended signal
through the use of a matching network or transformer. When
centered on the VPOS supply voltage, the outputs swing ±1 V.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
1dB
: 2.8 dBm
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
The LO driver circuitry typically consumes 15 mA of current.
Two external resistors are used to set the mixer core current for
required performance, resulting in a total current of 20 mA to
60 mA. This corresponds to power consumption of 100 mW to
300 mW with a single 5 V supply.
The AD8343 is fabricated on Analog Devices, Inc. ’ s high-
performance 25 GHz silicon bipolar IC process. The AD8343 is
available in a 14-lead TSSOP package. It operates over a −40°C
to +85°C temperature range. A device-populated evaluation
board is available.
FUNCTIONAL BLOCK DIAGRAM
COMM
COMM
PWDN
VPOS
DCPL
INPM
INPP
High IP3 Active Mixer
1
2
3
4
5
6
7
©2006 Analog Devices, Inc. All rights reserved.
BIAS
AD8343
Figure 1.
DC-to-2.5 GHz
14
13
12
11
10
9
8
COMM
OUTP
OUTM
COMM
LOIP
LOIM
COMM
AD8343
www.analog.com

Related parts for ad8343-evalz

ad8343-evalz Summary of contents

Page 1

... This corresponds to power consumption of 100 mW to 300 mW with a single 5 V supply. The AD8343 is fabricated on Analog Devices, Inc. ’ s high- performance 25 GHz silicon bipolar IC process. The AD8343 is available in a 14-lead TSSOP package. It operates over a −40°C to +85° ...

Page 2

... AD8343 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Basic Operating Instructions ...................................................... 3 Typical AC Performance.............................................................. 4 Typical Isolation Performance .................................................... 4 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Simplified Interface Schematics ................................................. 7 Typical Performance Characteristics ............................................. 8 Receiver Characteristics .............................................................. 8 Transmit Characteristics............................................................ 13 Circuit Description ...

Page 3

... Time from device on to off; see Figure 52 Time from device off to on; see Figure 53 PWDN = 0 V (device on) PWDN = 5 V (device off ) R3 and R4 = 68.1 Ω; see Figure 72 Over temperature Over temperature 5 Rev Page AD8343 Min Typ Max Unit 1.1 1 68.1 Ω 5 1.4 Ω ...

Page 4

... AD8343 TYPICAL AC PERFORMANCE 25°C; see Figure 72, Table 6 through Table Table 2. Input Frequency (MHz) Output Frequency (MHz) RECEIVER CHARACTERISTICS 400 70 900 170 1900 170 2400 170 2400 425 TRANSMITTER CHARACTERISTICS 150 900 150 1900 TYPICAL ISOLATION PERFORMANCE 25°C; see Figure 72, Table 6 through Table 8. ...

Page 5

... Exposure to absolute maximum rating conditions for extended periods may affect 1 mA device reliability. 500 mV ESD CAUTION 320 mW 125°C/W 125°C −40° 85°C −65°C to +150°C 300°C Rev Page AD8343 ...

Page 6

... Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3. 13 OUTP Open-Collector Differential Output Pin. This pin needs to be dc-biased and (usually) ac-coupled; see Figure 3. COMM COMM 1 14 AD8343 INPP OUTP 2 13 TOP VIEW INPM 3 12 ...

Page 7

... Figure 4. LO Port LOIP LOIM DC VBIAS 400Ω 400Ω Rev Page VPOS 5V DC 25kΩ PWDN BIAS CELL Figure 5. Power-Down Pin 2V DC DCPL BIAS VPOS CELL R1 10Ω 360mV DC LOIP LO BUFFER 360mV DC LOIM Figure 6. Bias Decoupling Pin AD8343 TO MIXER CORE ...

Page 8

... AD8343 TYPICAL PERFORMANCE CHARACTERISTICS RECEIVER CHARACTERISTICS f = 400 MHz MHz 330 MHz, see Figure 72, Table 6, and Table 8. IN OUT 5.37 5.42 5.47 5.52 5.57 CONVERSION GAIN (dB) Figure 7. Gain Histogram 400 MHz 19.9 20.0 20.1 20.2 20.3 20.4 20.5 20.6 20.7 20.8 20.9 21.0 INPUT IP3 (dBm) Figure 8. Input IP3 Histogram; f ...

Page 9

... TEMPERATURE (°C) Figure 16. Gain Performance Over Temperature 170 MHz OUT –40 – TEMPERATURE (° 170 MHz OUT 5.0 4.5 4.0 3.5 3.0 2.5 2.0 –40 – TEMPERATURE (° 900 MHz 170 MHz IN OUT AD8343 900 MHz , 900 MHz ...

Page 10

... AD8343 f = 1900 MHz 170 MHz 1730 MHz, see Figure 72, Table 6, and Table 8. IN OUT MEAN: 7.09dB 6.75 6.80 6.85 6.90 6.95 7.00 7.05 CONVERSION GAIN (dB) Figure 19. Gain Histogram 1900 MHz MEAN: 16.54dBm 14.0 14.5 15.0 15.5 16.0 16.5 INPUT IP3 (dBm) Figure 20. Input IP3 Histogram ...

Page 11

... TEMPERATURE (° 170 MHz OUT –40 – TEMPERATURE (° 170 MHz OUT 3.0 2.5 2.0 1.5 1.0 0.5 0 –40 – TEMPERATURE (° 2400 MHz 170 MHz IN OUT AD8343 2400 MHz 2400 MHz ...

Page 12

... AD8343 f = 2400 MHz 425 MHz 1975 MHz, see Figure 72, Table 6, and Table 8. IN OUT 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.6 CONVERSION GAIN (dB) Figure 31. Gain Histogram 2400 MHz INPUT IP3 (dBm) Figure 32. Input IP3 Histogram; f ...

Page 13

... TEMPERATURE (°C) Figure 40. Gain Performance Over Temperature 150 MHz 900 MHz IN OUT –40 – TEMPERATURE (° 900 MHz OUT 0 –40 – TEMPERATURE (° 150 MHz 900 MHz IN OUT AD8343 150 MHz ...

Page 14

... AD8343 f = 150 MHz 1900 MHz 1750 MHz, see Figure 72, Table 6, and Table 7. IN OUT –1.0 –0.8 –0.6 –0.4 –0.2 0 0.2 0.4 CONVERSION GAIN (dB) Figure 43. Gain Histogram 150 MHz 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 INPUT IP3 (dBm) Figure 44. Input IP3 Histogram; f ...

Page 15

... CIRCUIT DESCRIPTION The AD8343 is a mixer intended for high-intercept applications. The signal paths are entirely differential and dc-coupled to permit high-performance operation over a broad range of frequencies; the block diagram (see Figure 1) shows the basic functional blocks. The bias cell provides a PTAT (proportional to absolute temperature) bias to the LO driver and core ...

Page 16

... It is not advised to leave the pin floating when the device is disabled; a resistive pull-up to VPOS is the minimum suggestion. The AD8343 requires about 2.2 μs to turn off when PWDN is asserted; turn-on time is about 500 ns. Figure 52 and Figure 53 show typical characteristics (they vary with bypass component values) ...

Page 17

... AC INTERFACES Because of the AD8343’s wideband design, there are several points to consider in its ac implementation; the basic ac signal connection diagram shown in Figure 55 summarizes these points. The input signal undergoes a single-ended to differential conversion and is then reactively matched to the impedance presented by the emitters of the core. The matching network also provides bias currents to these emitters ...

Page 18

... The maximum power transfer into the device occurs when there is a conjugate impedance match between the signal source and the input of the AD8343. This match is achieved with the differential equivalent of the classic L network, as illustrated in Figure 56. The figure gives two examples of the transformation from a single-ended L network to its differential counterpart ...

Page 19

... It is important to note that the reliability of the AD8343 can be compromised for core currents set to higher than 20 mA. The AD8343 is tested to ensure that a value of 68.1 Ω ±1% ensures safe operation. Higher operating currents reduce distortion and affect gain, noise figure, and input impedance (Figure 58 and Figure 59) ...

Page 20

... AD8343 OUTPUT INTERFACE (OUTP, OUTM) The output of the AD8343 comprises a balanced pair of open collector outputs. These should be biased to about the same voltage as is connected to VPOS. Connecting them to an appre- ciably higher voltage is likely to result in conduction of the ESD protection network on signal peaks, causing high distortion levels. ...

Page 21

... INPUT AND OUTPUT STABILITY CONSIDERATIONS The differential configuration of the input and output ports of the AD8343 raises the need to consider both differential and common-mode RF stability of the device. Throughout the following stability discussion, common mode is used to refer to a signal that is referenced to ground. The equivalent common- mode impedance is the value of impedance seen from the node under discussion to ground ...

Page 22

... FREQUENCY (50MHz TO 2500MHz) Figure 64. LO Input Differential Reflection Coefficient At low LO frequencies reasonable to drive the AD8343 with a single-ended LO, connecting the undriven LO pin to GND through a dc block. This results input imped- ance closer to 25 Ω at low frequencies, which should be factored into the design ...

Page 23

... Measure AD8343 Differential Impedance at Location of First Matching Component Once the target impedance is established, the next step in matching to the AD8343 is to measure the differential impedance at the location of the first matching component. The A side of the evaluation board is designed to facilitate doing so. Before doing the board measurements necessary to perform a full two-port calibration of the VNA at the ends of the cables that are used to connect to the board’ ...

Page 24

... LO-output isolation. Transfer the Matching Network to the Final Design On the B side of the AD8343 evaluation board, install the matching network and the input balun. Install the same output network as used for the work on the A side, then power up the board and measure the input return loss at the RF input connector on the board ...

Page 25

... One approach to dealing with this problem is to access the desired measure- ment points by soldering down semirigid coaxial cables that have been connected to the VNA and directly calibrated at the free ends. Rev Page AD8343 ...

Page 26

... The differential input and output matching networks are designed between the balun and the I/O pins of the AD8343. The local oscillator signal at a level of –12 dBm to –3 dBm is brought in through a third 1:1 balun. ...

Page 27

... Figure 48 and most other data contained in this data sheet. Table 6 lists the support components that are delivered with the AD8343 evaluation board. Note that the board is shipped without any frequency specific components installed. Table 7 lists the components used to obtain the frequency selection necessary for the product receiver evaluation, and Table 8 lists the transmitter evaluation components ...

Page 28

... AD8343 Table 8. Values of Matching Components Used for Receiver Characterization Component Designator f = 400 MHz MHz IN OUT T1B, T2B T3B R6B, R7B Z1B, Z3B Z2B Z5B, Z7B Z6B L1B, L2B Z4B, Z8B, L3B, L4B, Z9B—Not Populated f = 900 MHz 170 MHz IN OUT ...

Page 29

... Rev Page J1A C7A L3A C9A Z5A OUTPUT_P_A Z9A Z6A Z8A OUTPUT_M_A C8A L4A Z7A C10A C12A LO INPUT_A T1A C13A 5 1 J1B L3B T3B C9B Z5B 1 6 OUTPUT_B 2 Z6B Z8B 3 4 L4B Z7B C10B C12B LO_INPUT_B T1B C13B 5 1 AD8343 ...

Page 30

... AD8343 Figure 74. Evaluation Board Artwork Top Figure 75. Evaluation Board Artwork Internal 1 Rev Page ...

Page 31

... Figure 76. Evaluation Board Artwork Internal 2 Figure 77. Evaluation Board Artwork Bottom Rev Page AD8343 ...

Page 32

... AD8343ARUZ –40°C to +85°C 1 AD8343ARUZ-REEL –40°C to +85°C 1 AD8343ARUZ-REEL7 –40°C to +85°C AD8343-EVAL 1 AD8343-EVALZ Pb-free part. ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01034-0-11/06(B) 5.10 5.00 4. 4.50 6 ...

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