1321XEVK Freescale Semiconductor, 1321XEVK Datasheet - Page 37

• Manufacturer Part Number: 1321XEVK
• Description: KIT EVALUATION FOR 1321X
• Manufacturer: Freescale Semiconductor
• Type: Zigbeer

Specifications of 1321XEVK

• Frequency: 2.4GHz
• Wireless Frequency: 2.4 GHz
• Modulation: DSSS OQPSK
• Security: 128 bit AES
• Operating Voltage: 2 VDC to 3.4 VDC
• Operating Temperature Range: - 40 C to + 85 C
• For Use With/related Products: MC1321x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

5.7.5
The HCS08 includes two independent serial communications interface (SCI) modules — sometimes called
universal asynchronous receiver/transmitters (UARTs). Typically, these systems are used to connect to the
RS232 serial input/output (I/O) port of a personal computer or workstation, and they can also be used to
communicate with other embedded controllers.
A flexible, 13-bit, modulo-based baud rate generator supports a broad range of standard baud rates beyond
115.2 kbaud. Transmit and receive within the same SCI use a common baud rate, and each SCI module
has a separate baud rate generator.
This SCI system offers many advanced features not commonly found on other asynchronous serial I/O
peripherals on other embedded controllers. The receiver employs an advanced data sampling technique
that ensures reliable communication and noise detection. Hardware parity, receiver wakeup, and double
buffering on transmit and receive are also included.
5.7.5.1
Features of SCI module include:
Freescale Semiconductor
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Full-duplex, standard non-return-to-zero (NRZ) format
Double-buffered transmitter and receiver with separate enables
Programmable baud rates (13-bit modulo divider)
Interrupt-driven or polled operation:
— Transmit data register empty and transmission complete
TPM1) EXT CLK
Serial Communications Interface (SCI) Module
CPWMS
SCI Features
BUSCLK
TPM1C1VH:TPM1C1VL
XCLK
TPM1MODH:TPM1MODL
MAIN 16-BIT COUNTER
16-BIT COMPARATOR
16-BIT COMPARATOR
16-BIT LATCH
CHANNEL 1
SYNC
MC13211/212/213 Technical Data, Rev. 1.8
Figure 21. TPM Block Diagram
COUNTER RESET
OFF, BUS, XCLK, EXT
CLKSB
MS1B
ELS1B
CLOCK SOURCE
SELECT
CLKSA
ELS1A
MS1A
CH1F
CH1IE
PS2
PRESCALE AND SELECT
1, 2, 4, 8, 16, 32, 64, or 128
TFIE
TOF
DIVIDE BY
PS1
LOGIC
PORT
INTERRUPT
INTERRUPT
LOGIC
LOGIC
PS0
TPM1CH1
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