AT24RF08-EK Atmel, AT24RF08-EK Datasheet - Page 9

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AT24RF08-EK

Manufacturer Part Number
AT24RF08-EK
Description
KIT EVAL FOR AT24RF08CN-10SC
Manufacturer
Atmel
Type
Dual Access EEPROMr

Specifications of AT24RF08-EK

Contents
Atmel Asset ID Kit CDROM, 4 RFID Tags, Reader with Serial Port Cable and 9V Power Supply
For Use With/related Products
AT24RF08C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Both the BL and PL registers used in the read and write
commands to determine the address are set to 0 upon
power-up. The PL value is automatically set to the transmit-
ted value when the Write Page and/or Read Page
commands are executed.
The “Set BL to ID” command permits the ID page (page 1)
to be written from the RFID port if the lock bit is set to a
one. This lock bit is the 121st bit sent as part of a write
page command or the 25th bit sent as part of a write word 3
command. The first 96 bits of this page are the ID bits
which are transmitted by the chip in the same order as they
are written.
The PL register value is ignored when the BL points to the
ID page. Also, the page number is ignored on page write
commands.
Listening Window Structure
After any header, ID or data element is read from the
d e v i c e ( f o r a n y r e a s o n ) t h e c h i p d e l a y s f u r t h e r
transmissions for a period of time to determine if the reader
intends to communicate with the tag. The length of the
various delays and the actions that the device takes during
this delay depends on the current state of the device and/or
any command issued by the reader.
In general, the tag expects to see communications from the
reader start between the middle of the first bit time and the
end of the second time (256 µs to 1024 µs) after the end of
the previous communication. The beginning of the first and
the entire third write bit times are ignored in order to
prevent the tag from erroneously seeing its own modulation
as incoming from the reader. Specific timing requirements
for th es e c om muni ca tio ns ar e sho wn i n the RFID
A c k n o w l e d g e t i m i n g d i a g r a m a n d t h e R F I D
Command/Data Timing Diagram on page 16.
There are four states possible for tags that are sufficiently
in the field for the internal voltage to be above the reset
level. They are listed below and shown in bold throughout
this document.
Init
Upon power up, and after execution of the global reset
quiet bit command, all chips are in this state. Chips that do
not have their
execution of a Disable/Set Quiet command. While in this
state, chips delay a random length of time and then
transmit their 4-bit header. Tags in this state honor all
global commands except those that start during the period
in which they are transmitting their header and during the
first 512 µs of the listening window. They transition to
Unselected after global command execution, other than
global reset quiet which stays in init.
QUIET
bit set also go into this state after the
Selected
If the reader issues an acknowledge pulse to a tag in the
init state during the second write bit time after the header is
transmitted, then the tag is selected and it will repeatedly
transmit its ID until the reader sends a command to the tag.
The tag remains selected through the entire sequence of
ID transmission and subsequent command execution
unless there is a fault of some kind.
Unselected
If a tag in the init state senses modulation interval greater
than 32 µs in length during any bit time other than the
second then it moves into the unselected state, and
remains that way until it sees a Disable Chip command.
Unselected tags also honor the three global commands
while they are “waiting”. All other commands are ignored.
Quiet
When in the quiet state, the chip does not activate its
modulation resistor at any time. Only the three global
c o m ma n d s wi l l b e h o n or e d b y th e c hi p . A l l o t h er
commands are ignored.
The following paragraphs describe five kinds of delays that
are possible.
Random
The chip delays a pseudo random length of time. The
length of this delay sequences through the following
number of read bit times (128 µs each): 64, 48, 24, 32, 56,
40 and 72. The starting point among this list is based on
the first three bits of byte 0 of the ID page within the
EEPROM. If these bits are 111, then the sequence above
will be preceded by a 16-bit delay. The minimum and
maximum delays are 2048 µs and 9216 µs, respectively.
Three Bit
The device waits for three write bit times and then one read
bit time (for a total of 1664 µs) before retransmitting the
data that was just transmitted. During the t
reader may issue a command to the chip. See “RFID
Command/Data Timing” on page 16.
Long
After certain commands, selected chips wait indefinitely for
the next command from the reader. This command should
start during the t
transmission.
Infinite
Unselected chips wait in this state for any of the three
global commands or the Disable Chip command. If no legal
command transmission ever occurs, then the device will
stay in this delay loop for as long as power is applied from
the RFID port.
CDM1
interval after the end of the command
AT24RF08C
CDM1
interval, the
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