AT24RF08-EK Atmel, AT24RF08-EK Datasheet - Page 8

• Manufacturer Part Number: AT24RF08-EK
• Description: KIT EVAL FOR AT24RF08CN-10SC
• Manufacturer: Atmel
• Type: Dual Access EEPROMr

Specifications of AT24RF08-EK

• Contents: Atmel Asset ID Kit CDROM, 4 RFID Tags, Reader with Serial Port Cable and 9V Power Supply
• For Use With/related Products: AT24RF08C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Non EEPROM aspects of the RFID port operation,
including setting of the tamper bit, will take place normally
regardless of the actions on the serial port. Operation of the
RFID port does not depend on the state of any pin or the
state of any sticky bits, as power to the chip may not be
applied via the
place.
RFID Commands
The explicit commands implemented in this tag permit the
reader/writer to directly access individual areas within the
memory array and are encoded as follows. In all cases
Command Encoding
The three global commands may be sent to selected chips
during the second bit of any three bit listening window or to
unselected, chips in the init state or quiet chips at any
time. In general, they operate upon all tags within the field,
however, if a chip is currently transmitting data to the
reader or waiting for an ACK pulse, it will not be able to
recognize these commands.
F o r t h e R e a d a n d W r i t e c o m m a n d s , t h e d a t a
corresponding to the accessed word or page is repeatedly
transmitted back to the reader by the device, after the
command has completed. This permits a verify function for
the write operation and a repetition check for the read data.
After the last bit of a read command is sent, there is a delay
of 136 cycles before the first read data bit is transmitted by
the chip. After a write command, there is a delay of t
before the written data is transmitted back to the reader.
8
b
0
0
0
0
0
0
0
0
0
0
0
0
10
b
e
e
e
e
e
e
e
e
e
e
e
e
9
b
1
1
1
1
1
1
1
1
1
1
1
1
8
VCC
W
W
W
b
B
P
P
P
1
0
1
1
1
pin when such operations are taking
7
2
2
2
2
1
1
1
AT24RF08C
W
W
W
b
B
P
P
P
1
1
0
1
0
6
1
1
1
1
0
0
0
b
B
P
P
P
1
0
0
0
1
0
0
1
5
0
0
0
0
b
0
0
1
1
0
1
0
1
1
1
1
1
4
b
0
1
0
0
0
1
1
1
1
1
1
1
3
b
0
0
0
1
1
1
1
0
0
0
0
1
2
wd
b
C
C
C
C
C
C
C
C
C
C
C
C
1
1
1
1
1
1
1
1
1
1
1
1
1
below, “C
(see “Error Detection” on page 11) for the command that is
used to prevent improper command execution.
For all commands, the first three bits transmitted (b
form a three bit unique command initiation pattern (CIP)
that allows the transponder to be synchronized with the
reader / writer. The middle bit of this pattern (signified by ‘e’
for error in the table below) is an entire bit time of no
modulation, which is a Manchester error. The entire
command initiation pattern consists of ½ bit time of
modulation followed by two bit times of no modulation
followed by ½ bit time of modulation.
There should be no modulation of the carrier by the reader
during these delays.
Between each 32 or 128 bits of data transmitted, there is a
3-bit listening window to synchronize the reader and/or to
permit the reader to issue a new command to the device.
See “Listening Window Structure” on page 9.
There is no delay interval between the transmission of the
write commands and the data that is to be written.
Immediately after the last bit of the command (C
most significant bit of the data should be sent to the device
without any interruption.
There is no retransmission of the data after the Global
Write Word command, since multiple tags are expected to
be able to have executed this command at the same time.
To verify proper operation of this command, each tag must
be individually selected and the word read explicitly using
the Read Word command.
b
C
C
C
C
C
C
C
C
C
C
C
C
0
0
0
0
0
0
0
0
0
0
0
0
0
Meaning
Set Block Address Latch (BL) to B
Set Page Address Latch (PL) to P
Set Block Address Latch (BL) to ID Block
Write Page P in Block BL (followed by 128 bits of data)
Read Page P in Block BL (followed by 128 bits of data)
Write Word W, Page PL, Block BL (32 bits of data)
Read Word W, Page PL, Block BL (32 bits of data)
Disable Chip Until Power Down (set QUIET bit)
Global Reset QUIET bit
Set EEPROM Tamper Latch (selected tag only)
Global Set EEPROM Tamper Latch
Global Write Word W, Page 1, Block 0 (32 bits of data)
1
C
0
” represents the two bit error detection field
10
0
), the
- b
8
)