AT24RF08-EK Atmel, AT24RF08-EK Datasheet

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AT24RF08-EK

Manufacturer Part Number
AT24RF08-EK
Description
KIT EVAL FOR AT24RF08CN-10SC
Manufacturer
Atmel
Type
Dual Access EEPROMr

Specifications of AT24RF08-EK

Contents
Atmel Asset ID Kit CDROM, 4 RFID Tags, Reader with Serial Port Cable and 9V Power Supply
For Use With/related Products
AT24RF08C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
Description
The AT24RF08C functions as a dual access EEPROM, with both a wired serial port
and a wireless RFID port used to access the memory. Access permissions are set
from the serial interface side to isolate blocks of memory from improper access. The
RFID interface can be powered solely from the attached coil permitting remote reads
and writes of the device when VCC is not applied.
Block Diagram
Pin Configurations
Pin Name
L1
L2
PROT
GND
SDA
SCL
WP
VCC
Dual-port Nonvolatile Memory - RFID and Serial Interfaces
Two-wire Serial Interface:
RFID Interface:
Highly-reliable EEPROM Memory
-40°C to +85°C Operation, 2.4V to 5.5V Supply, 8-Lead JEDEC SOIC Package
– Compatible with a Standard AT24C08 Serial EEPROM
– Programmable Access Protection to Limit Reads or Writes from Either Port
– Lock/Unlock Function, Coil Connection Detection
– 125 kHz Carrier Frequency for Long Range Access
– 2-Wire Connection to External Coil Antenna and Tuning Capacitor
– Multi-tag Management to Handle Several Tags in the Field at Once
– 12 RFID Commands for Tag Control and Memory Read/Write
– ID Write and Lock from RFID Port
– Ultra Low Power Single Bit Write - 25 µA
– 8K bits (1K bytes), Organized as 8 Blocks of 128 Bytes Each
– 16-byte Page Write, 10 ms Write Time
– 10 Years Retention, 100K Write Cycle Endurance
Function
Coil Connection
Coil Connection
Protection Input
Ground
Serial Data,Open Drain I/O
Serial Clock Input
Write Protect Input
Supply: 2.4V - 5.5V
8-Pin SOIC
PROT
GND
L1
L2
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
Asset
Identification
EEPROM
AT24RF08C
Rev. 1072E–09/99
1

Related parts for AT24RF08-EK

AT24RF08-EK Summary of contents

Page 1

... Operation, 2.4V to 5.5V Supply, 8-Lead JEDEC SOIC Package Description The AT24RF08C functions as a dual access EEPROM, with both a wired serial port and a wireless RFID port used to access the memory. Access permissions are set from the serial interface side to isolate blocks of memory from improper access. The RFID interface can be powered solely from the attached coil permitting remote reads and writes of the device when VCC is not applied ...

Page 2

... General Overview The AT24RF08C is intended to be pin compatible with standard serial EEPROM devices except for pins 1, 2 and 3, which are address pins in the standard part. Other exceptions to the AT24C08 Serial EEPROM data sheet are noted in the “Serial EEPROM Exceptions” section later in this document ...

Page 3

... Block 0 Write Protection Bits The AT24RF08C provides a mechanism to divide block 0 into eight 128-bit (16 byte) pages that can be individually protected against writes from either port. These eight write ...

Page 4

... Setting of this bit from the RFID side when powered from L1/L2, takes about 7.9 ms but requires less than 30 µA of current. See “RFID Command” on page 8. AT24RF08C 4 There is no individual page Write Protection for any other block other than block 0 within the device. Within the ...

Page 5

... NACK’ed example, the bit encoding for a single byte read and write command are shown below. The AT24RF08C will acknowledge all device addresses (hex). If the most significant three bits of the word address are not all 0 (indicating an address outside the Access Protection and ID pages), the chip will NACK the access ...

Page 6

... The MSB of the last byte of the ID page is a lock bit that controls writes to the ID page from the RFID port. If this bit AT24RF08C 6 The memory map for the access protection page is shown in the table below. In this table means that the value is a don’ ...

Page 7

... Serial EEPROM Exceptions In general, the two-wire serial interface on the AT24RF08C functions identically to the AT24C08. The following exceptions exist, as noted elsewhere within this document. • Pins 1, 2 and 3 have a different usage. • Access to various blocks may be restricted via the access protection circuitry. ...

Page 8

... After the last bit of a read command is sent, there is a delay of 136 cycles before the first read data bit is transmitted by the chip. After a write command, there is a delay of t before the written data is transmitted back to the reader. AT24RF08C 8 below, “C (see “Error Detection” on page 11) for the command that is used to prevent improper command execution ...

Page 9

... They transition to Unselected after global command execution, other than global reset quiet which stays in init. AT24RF08C Selected If the reader issues an acknowledge pulse to a tag in the init state during the second write bit time after the header is transmitted, then the tag is selected and it will repeatedly transmit its ID until the reader sends a command to the tag ...

Page 10

... After the data for a write is sent to the device, there will be a delay of T reader and then the ‘three bit’ window will occur. During this delay, the device ignores all data sent to it. AT24RF08C 10 Global Reset Quiet command may be issued to reset all tags, but this will be ignored by a device while it is transmitting its ID ...

Page 11

... Progress Error Detection In order to increase the reliability of data transmissions to the AT24RF08C, an error detection field must be sent by the reader after the command word and each byte of data sent from the reader. This field is computed as the number of bits turned on in the byte modulo 4. In order to prevent the checksum from matching the data for repeated 0’ ...

Page 12

... Each data or ID group transmitted (other than the header) includes a start bit which has a value of 1. This is always Data Transmission AT24RF08C 12 interpreted as a transition from modulator-off to modulator the middle of the start bit time, preventing a half-bit time modulation pulse. Data is transmitted from the chip at a rate of one bit (into the encoder) for each 16 carrier cycles ...

Page 13

... CMD1 previously transmitted or received by the chip. This edge is Data Reception AT24RF08C used to start a bit clock against which all remaining edges are timed. The remaining two edges within the CIP occur during the middle of the first and third bit times of the command. They ...

Page 14

... Storage Temperature (Without Bias)...................-55 to +125 C Voltage on V with CC Respect to Ground............................................................6.0V Voltage on SDA, SCL, PROT and WP............-0 AT24RF08C 14 Proper setting of the tamper bit feature is guaranteed only if is above 3.7V for greater than 6.1 ms, but under V COIL typical conditions, the circuit will operate over a much wider range ...

Page 15

... 950 Test Waveform AT24RF08 L1 VL1 L2 VL2 GND AT24RF08C Notes Maximum Power Dissipation from L1/L2, Peak (2) Coil Voltage for ID Transmission (2) Coil Voltage for EEPROM Writes and Reads Peak Clamp Current During EEPROM Read 2.2V L1/L2 During Tamper Bit Write 2.2V L1/L2 During EEPROM Write ...

Page 16

... BITW t 5 5.6 7.9 TWD t 16 MODF t 16 MODR RF Write Delay AT24RF08C 16 Max Units Notes 130 kHz Coil Excitation Frequency 133 µs Read Bit Time, Over f 531 µs Write Bit Time, Over f 11.8 ms Write Delay, Modulation Edge to Modulation Edge 11 ...

Page 17

... Delay from Header End to ACK. Start 1024 µs Delay from Header End to ACK. End 512 µs Acknowledge Pulse Width 1024 µs Delay from Data End to CIP Start 368 µs Delay from Bit Time Start to Modulation Change 624 µs Delay from Modulation Change to Next Same Change AT24RF08C 17 ...

Page 18

... SU.STA t 0 HD.DAT t 200 SU.DAT 4.7 SU.STO t 300 AT24RF08C 18 Max Units Notes 100 kHz Clock (SCL) Frequency µs Clock (SCL) Pulse Low-width µs Clock (SCL) Pulse High-width 100 ns Noise Suppression, Not Tested 4.5 µs Clock low to Data out Valid µs Bus Free before Transmission, Not Tested µ ...

Page 19

... EEPROM Writes CC SDA 5.5V, SDA, SCL = V , RFID Idle 3.3V, SDA, SCL = V , RFID Idle CC SS PROT, SDA, SCL Input Current on WP 2.1mA OL SCL, PROT, WP. Not Tested SDA. Not Tested Units Notes years Data retention at operating temperature Per byte Ordering Code AT24RF08CN - 10SC ...

Page 20

... Outline (JEDEC SOIC) Dimensions in Millimeters and (Inches) .020 (.508) .013 (.330) .157 (3.99) .150 (3.81) PIN 1 .050 (1.27) BSC .196 (4.98) .189 (4.80) .010 (.254) .004 (.102) 0 REF 8 .050 (1.27) .016 (.406) AT24RF08C 20 .244 (6.20) .228 (5.79) .068 (1.73) .053 (1.35) .010 (.254) .007 (.203) ...

Page 21

... No licenses to patents or other intellectual prop- erty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. ...

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