AT91SAM7S64C-AU Atmel, AT91SAM7S64C-AU Datasheet - Page 382

• Manufacturer Part Number: AT91SAM7S64C-AU
• Description: IC ARM7 MCU 32BIT 64K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S64C-AU

• Package / Case: 64-LQFP
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 55MHz
• Number Of I /o: 32
• Core Processor: ARM7
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Core Size: 16/32-Bit
• Core: ARM7TDMI
• Package: 64LQFP
• Device Core: ARM7TDMI
• Family Name: AT91
• Maximum Speed: 55 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 32
• Interface Type: SPI/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S64B-AU::AT91SAM7S64B-AU

31.6.7
31.6.8
31.6.8.1
382
AT91SAM7S Series Preliminary
AT91SAM7S512/256/128/64/321/161 Modem Mode
Test Modes
Normal Mode
The USART features modem mode, which enables control of the signals: DTR (Data Terminal
Ready), DSR (Data Set Ready), RTS (Request to Send), CTS (Clear to Send), DCD (Data Car-
rier Detect) and RI (Ring Indicator). While operating in modem mode, the USART behaves as a
DTE (Data Terminal Equipment) as it drives DTR and RTS and can detect level change on DSR,
DCD, CTS and RI.
Setting the USART in modem mode is performed by writing the USART_MODE field in the Mode
Register (US_MR) to the value 0x3. While operating in modem mode the USART behaves as
though in asynchronous mode and all the parameter configurations are available.
Table 31-11
Table 31-11. Circuit References
The control of the DTR output pin is performed by writing the Control Register (US_CR) with the
DTRDIS and DTREN bits respectively at 1. The disable command forces the corresponding pin
to its inactive level, i.e. high. The enable command forces the corresponding pin to its active
level, i.e. low. RTS output pin is automatically controlled in this mode
The level changes are detected on the RI, DSR, DCD and CTS pins. If an input change is
detected, the RIIC, DSRIC, DCDIC and CTSIC bits in the Channel Status Register (US_CSR)
are set respectively and can trigger an interrupt. The status is automatically cleared when
US_CSR is read. Furthermore, the CTS automatically disables the transmitter when it is
detected at its inactive state. If a character is being transmitted when the CTS rises, the charac-
ter transmission is completed before the transmitter is actually disabled.
The USART can be programmed to operate in three different test modes. The internal loopback
capability allows on-board diagnostics. In the loopback mode the USART interface pins are dis-
connected or not and reconfigured for loopback internally or externally.
Normal mode connects the RXD pin on the receiver input and the transmitter output on the TXD
pin.
USART Pin
TXD
RTS
DTR
RXD
CTS
DSR
DCD
RI
gives the correspondence of the USART signals with modem connection standards.
V24
2
4
20
3
5
6
8
22
CCITT
103
105
108.2
104
106
107
109
125
Direction
From terminal to modem
From terminal to modem
From terminal to modem
From modem to terminal
From terminal to modem
From terminal to modem
From terminal to modem
From terminal to modem
6175K–ATARM–30-Aug-10