AT91SAM7S64C-AU Atmel, AT91SAM7S64C-AU Datasheet - Page 130
AT91SAM7S64C-AU
Manufacturer Part Number
AT91SAM7S64C-AU
Description
IC ARM7 MCU 32BIT 64K 64LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7S16-MU.pdf
(779 pages)
Specifications of AT91SAM7S64C-AU
Package / Case
64-LQFP
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
55MHz
Number Of I /o
32
Core Processor
ARM7
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, SPI, SSC, UART/USART, USB
Core Size
16/32-Bit
Core
ARM7TDMI
Package
64LQFP
Device Core
ARM7TDMI
Family Name
AT91
Maximum Speed
55 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
32
Interface Type
SPI/TWI/USART/USB
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
AT91SAM7S64B-AU::AT91SAM7S64B-AU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S64C-AU
Manufacturer:
ATMEL
Quantity:
4 300
Part Number:
AT91SAM7S64C-AU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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20.2.5
20.2.5.1
130
AT91SAM7S Series Preliminary
Device Operations
Flash Read Command
Several commands on the Flash memory are available. These commands are summarized in
Table 20-3 on page
face running several read/write handshaking sequences.
When a new command is executed, the previous one is automatically achieved. Thus, chaining
a read command after a write automatically flushes the load buffer in the Flash.
In the following tables, 21-6 through 21-18
This command is used to read the contents of the Flash memory. The read command can start
at any valid address in the memory plane and is optimized for consecutive reads. Read hand-
shaking can be chained; an internal address buffer is automatically increased.
Table 20-6.
Table 20-7.
Step
1
2
3
4
5
...
n
n+1
n+2
n+3
...
Step
1
2
3
4
5
6
7
...
n
• DATA[15:0] pertains to AT91SAM7S512/256/128/64/321/161
• DATA[7:0] pertains to AT91SAM7S32/16
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Handshake Sequence
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Write handshaking
Read handshaking
Read handshaking
...
Write handshaking
Read Command
Read Command
126. Each command is driven by the programmer through the parallel inter-
MODE[3:0]
CMDE
ADDR0
ADDR1
DATA
DATA
...
ADDR0
ADDR1
DATA
DATA
...
MODE[3:0]
CMDE
ADDR0
ADDR1
ADDR2
ADDR3
DATA
DATA
...
ADDR0
DATA[15:0]
READ
Memory Address LSB
Memory Address
*Memory Address++
*Memory Address++
...
Memory Address LSB
Memory Address
*Memory Address++
*Memory Address++
...
READ
Memory Address LSB
Memory Address
Memory Address
Memory Address
*Memory Address++
*Memory Address++
...
Memory Address LSB
DATA[7:0]
6175K–ATARM–30-Aug-10
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