USBLC6-4SC6 STMicroelectronics, USBLC6-4SC6 Datasheet - Page 6

• Manufacturer Part Number: USBLC6-4SC6
• Description: IC ESD PROTECTION HS SOT23-6
• Manufacturer: STMicroelectronics

Specifications of USBLC6-4SC6

• Voltage - Working: 5V
• Voltage - Clamping: 6V
• Technology: Mixed Technology
• Number Of Circuits: 4
• Applications: USB
• Package / Case: SOT-23-6
• Polarity: Bidirectional
• Channels: 4 Channels
• Clamping Voltage: 17 V
• Operating Voltage: 5 V
• Breakdown Voltage: 6 V
• Termination Style: SMD/SMT
• Peak Surge Current: 5 A
• Capacitance: 3.5 pF
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Dimensions: 1.75 mm W x 3.05 mm L x 1.45 mm H
• Diode Type: ESD Protection
• Clamping Voltage Vc Max: 17V
• Diode Case Style: SOT-23
• No. Of Pins: 6
• Standoff Voltage: 5V
• Filter Terminals: SMD
• Breakdown Voltage Min: 6V
• Rohs Compliant: Yes
• Clamping Voltage 8/20us Max: 17V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-4492-2

Technical information
Note:
Important:
2.4
2.4.1
6/13
Figure 9.
The measurements have been done with the USBLC6-4SC6 in open circuit.
A good precaution to take is to put the protection device as close as possible to the
disturbance source (generally the connector).
Crosstalk behavior
Crosstalk phenomenon
Figure 11. Crosstalk phenomenon
The crosstalk phenomenon is due to the coupling between 2 lines. The coupling factor ( 12
or 21) increases when the gap across lines decreases, particularly in silicon dice. In the
above example the expected signal on load R
has got an extra value
crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into
account when the drivers impose fast digital data or high frequency analog signals in the
disturbing line. The perturbed line will be more affected if it works with low voltage signal or
high load impedance (few k ).
Remaining voltage after the
USBLC6-4SC6 during positive ESD
surge
V
G1
V
G2
21
DRIVERS
R
V
G1
G1
R
. This part of the V
G2
Figure 10. Remaining voltage after the
Line 1
Line 2
L2
is
G1
2
signal represents the effect of the
V
USBLC6-4SC6 during negative ESD
surge
G2
, in fact the real voltage at this point
RECEIVERS
R
L2
R
L1
2
V
G2
+
1
21
V
V
USBLC6-4
G1
G1
+
12
V
G2