USBLC6-4SC6 STMicroelectronics, USBLC6-4SC6 Datasheet - Page 5

• Manufacturer Part Number: USBLC6-4SC6
• Description: IC ESD PROTECTION HS SOT23-6
• Manufacturer: STMicroelectronics

Specifications of USBLC6-4SC6

• Voltage - Working: 5V
• Voltage - Clamping: 6V
• Technology: Mixed Technology
• Number Of Circuits: 4
• Applications: USB
• Package / Case: SOT-23-6
• Polarity: Bidirectional
• Channels: 4 Channels
• Clamping Voltage: 17 V
• Operating Voltage: 5 V
• Breakdown Voltage: 6 V
• Termination Style: SMD/SMT
• Peak Surge Current: 5 A
• Capacitance: 3.5 pF
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Dimensions: 1.75 mm W x 3.05 mm L x 1.45 mm H
• Diode Type: ESD Protection
• Clamping Voltage Vc Max: 17V
• Diode Case Style: SOT-23
• No. Of Pins: 6
• Standoff Voltage: 5V
• Filter Terminals: SMD
• Breakdown Voltage Min: 6V
• Rohs Compliant: Yes
• Clamping Voltage 8/20us Max: 17V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-4492-2

USBLC6-4
2.3
Figure 7.
Figure 6.
How to ensure good ESD protection
While the USBLC6-4SC6 provides high immunity to ESD surge, efficient protection depends
on the layout of the board. In the same way, with the rail to rail topology, the track from data
lines to I/O pins, from V
as possible to avoid overvoltages due to parasitic phenomena (see
layout considerations)
ESD behavior: optimized layout and
addition of a capacitance of 100 nF
Optimized layout
Unsuitable layout
V
V
V
CL
CL-
ESD sur ge on data line
TRANSIL
+ = V
ESD behavior: parasitic phenomena due to unsuitable layout
= -V - L
TRANSIL
F
=
L
I/O
I/O
V
BR
I/O pin
di
dt
+ V + L
+
CC
Rd.Ip
L
- L
F
I/O
GND
dt
di
to the V
I/O
L
L
dt
V
di
VBUS
GND
F
di
dt
+ L
V
GND
GND pin
BUS
CC
V
L
TRANSIL
GND
pin
di
dt
di
dt
pin and from GND plane to GND pin must be as short
Figure 8.
sur ge > 0
sur ge > 0
V
CL
V
Data line
BUS
ESD SURGE
L
-L
I/O
I/O
V
ESD behavior: measurement
conditions (with coupling
capacitance)
di
dt
di
dt
TRANSIL
+ L
- L
GND
GND
+ V
- V
di
dt
di
dt
F
F
TEST BOARD
IN
t = 1 ns
t = 1 ns
r
r
V
V
CL-
CL+
USBLC6-4SC6
Figure 7
Technical information
OUT
Negative
Positive
Sur ge
Sur ge
and
Figure 8
t
t
V bus
5/13
for