SAK-C868-1SR BA Infineon Technologies, SAK-C868-1SR BA Datasheet - Page 65

• Manufacturer Part Number: SAK-C868-1SR BA
• Description: IC MCU 8BIT 8KB RAM TSSOP-38-1
• Manufacturer: Infineon Technologies
• Series: C5xx/C8xxr

Specifications of SAK-C868-1SR BA

• Core Processor: C800
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: RAM
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: SAKC8681SRBAXT; SP000014357

Power Saving Modes
The C868 provides two basic power saving modes, the idle mode and the power down
mode. Additionally, a slow down mode is available. This power saving mode reduces the
internal clock rate in normal operating mode and it can also be used for further power
reduction in idle mode.
• Idle Mode
• Slow Down Mode
• Software Power Down Mode
Data Sheet
In the idle mode, the oscillator of the C868 continues to run, but the CPU is gated off
from the clock signal. However, the interrupt system, the serial port, the A/D converter,
the capture/compare unit, and all timers are further provided with the clock. The CPU
status is preserved in its entirety: the stack pointer, program counter, program status
word, accumulator, and all other registers maintain their data during idle mode.
In some applications, where power consumption and dissipation are critical, the
controller might run for a certain time at reduced speed (for example, if the controller
is waiting for an input signal). Since in CMOS devices, there is an almost linear
dependence of the operating frequency and the power supply current, so, a reduction
of the operating frequency results in reduced power consumption.
In the software power down mode, the on-chip oscillator which operates with the XTAL
pins and the PLL are all stopped. Therefore, all functions of the microcontroller are
stopped and only the contents of the on-chip RAM, XRAM and the SFR's are
maintained. The port pins, which are controlled by their port latches, output the values
that are held by their SFR's. The port pins which serve the alternate output functions
show the values they had at the end of the last cycle of the instruction which initiated
the power down mode. ALE is held at logic low level or high impedance if disabled. In
the power down mode of operation, V
consumption. It must be ensured, however, that V
down mode is invoked, and that V
the power down mode is terminated.
DDP
is restored to its normal operating level before
65
DDP
can be reduced to minimize power
DDP
is not reduced before the power
V 1.0, 2003-05
C868