SAK-C868-1SR BA Infineon Technologies, SAK-C868-1SR BA Datasheet - Page 17

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SAK-C868-1SR BA

Manufacturer Part Number
SAK-C868-1SR BA
Description
IC MCU 8BIT 8KB RAM TSSOP-38-1
Manufacturer
Infineon Technologies
Series
C5xx/C8xxr
Datasheet

Specifications of SAK-C868-1SR BA

Core Processor
C800
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
RAM
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
38-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
SAKC8681SRBAXT
SP000014357
Bootstrap loader
The C868, includes a bootstrap mode, which is activated by setting the ALE/BSL pin at
logic low with a pulldown and TxD pin at logic high with a pullup at the rising edge of the
RESET. Or it can be entered by software, that is by setting BSLEN bit and resetting
SWAP bit in SFR SYSCON1 accompany by an unlock sequence.
In the bootstrap mode, software routines of the bootstrap loader located in the boot ROM
will be executed. Its purpose is to allow the easy and quick programming of the internal
SRAM (0000
the MCU is in-circuit. It also provides a way to program SRAM or XRAM through
bootstrapping from an external SPI or I2C EEPROM.
The first action of the bootstrap loader is to detect the presence of EEPROM and its type,
SPI or I2C, and check the first byte of the serial EEPROM. If the first byte is 0A5
MCU would enter Phase A to download from the EEPROM. Otherwise, it will enter
Phase B to establish a serial communication with the connected host. Bootstrapping
from the serial EEPROM can also be done in phase B if it is invoked by the host.
Phase B consists of two functional parts that represent two phases:
• Phase I: Establish a serial connection and automatically synchronize to the transfer
• Phase II: Perform the serial communication with the host. The host controls the
Table 4
Modes
0
1
2
3
4
5-9
The phases of the bootstrap loader are illustrated in
Data Sheet
speed (baud rate) of the serial communication partner (host).
communication by sending special header information, which select one of the
working modes. These modes are:
H
Serial Communication Modes of Phase B
Description
Transfer a customer program from the host to the SRAM (0000
1FFF
phase II and wait for the next command from the host.
Execute a customer program in the XRAM at start address FF00
Execute a customer program in the SRAM at start address 0000
Transfer a customer program from the SPI EEPROM to the SRAM
(0000
beginning of phase II and wait for the next command from the host.
Transfer a customer program from the I2C EEPROM to the SRAM
(0000
beginning of phase II and wait for the next command from the host.
reserved
to 1FFF
H
H
H
) or XRAM (FF00
H
to 1FFF
to 1FFF
) or XRAM (FF00
H
H
) or XRAM (FF00
) or XRAM (FF00
H
H
-FFFF
17
to FFFF
H
). Then return to the beginning of
H
H
H
Figure
) via serial interface (UART) while
-FFFF
-FFFF
7.
H
H
).
).
Then return to the
Then return to the
V 1.0, 2003-05
H
H
.
.
C868
H
H
, the
to

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