DS89C420-ENG Maxim Integrated Products, DS89C420-ENG Datasheet - Page 36

• Manufacturer Part Number: DS89C420-ENG
• Description: IC MCU ULTRA 25MHZ HP 44-TQFP
• Manufacturer: Maxim Integrated Products
• Series: 89Cr

Specifications of DS89C420-ENG

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

timer/counters without auto-reload. Each timer can also be used as a counter of external pulses on the
corresponding T0/T1 pin for 1-to-0 transitions. The timer mode (TMOD) register controls the operation mode. Each
timer consists of a 16-bit register in 2 bytes, which can be found in the SFR map as TL0, TH0, TL1, and TH1. The
timer control (TCON) register enables Timers 0 and 1.
Table 12. Timer Functions
*8-bit timer/counter includes auto-reload feature; 2- x 8-bit mode does not.
Timer 2 is a true 16-bit timer/counter that, with a 16-bit capture (RCAP2L and RCAP2H) register, is able to provide
some unique functions like up/down auto-reload timer/counter and timer-output clock generation. Timer 2 (registers
TL2 and TH2) is enabled by the T2CON register, and its mode of operation is selected by the T2MOD register.
Each timer has a selectable time base
drop-in compatible with the 8051. If Timer 2 is used as a baud rate generator or clock output, its time base is fixed
at divide by 2, regardless of the setting of its timer mode bits.
For details of operation, refer to “Programmable Timers” in the Ultra-High-Speed Flash Microcontroller User’s
Guide.
TIMED ACCESS
The timed access function provides control verification to system functions. The timed access function prevents an
errant CPU from making accidental changes to certain SFR bits that are considered vital to proper system
operation. This is achieved by using software control when accessing the following SFR control bits:
WDCON.0
WDCON.1
WDCON.3
WDCON.6
EXIF.0
ACON.5
ACON.6
ACON.7
ROMSIZE.0
ROMSIZE.1
ROMSIZE.2
ROMSIZE.3
FCNTL.0
FCNTL.1
FCNTL.2
FCNTL.3
Timer/Counter
Timer with Capture
External Control-Pulse Counter
Up/Down Auto-Reload Timer/Counter
Baud Rate Generator
Timer-Output Clock Generator
FUNCTIONS
FC0
FC1
FC2
FC3
RWT
EWT
WDIF
POR
BGS
PAGES0
PAGES1
PAGEE
RMS0
RMS1
RMS2
PRAME
Flash Command Bit 0
Flash Command Bit 1
Flash Command Bit 2
Flash Command Bit 3
Reset Watchdog Timer
Watchdog Reset Enable
Watchdog Interrupt Flag
Power-On Reset Flag
Bandgap Select
Page Mode Select Bit 0
Page Mode Select Bit 1
Page Mode Enable
Program Memory Size Select Bit 0
Program Memory Size Select Bit 1
Program Memory Size Select Bit 2
Program RAM Enable
(Table
13/16/8
TIMER 0
Yes
14). Following a reset, the timers default to divide-by-12 to maintain
No
No
No
No
*
/2 x 8 bit
36 of 47
13/16/8
TIMER 1
Yes
Yes
No
No
No
*
bit
TIMER 2
16 bit
Yes
Yes
Yes
Yes
No