MCHC11F1CFNE3 Freescale Semiconductor, MCHC11F1CFNE3 Datasheet - Page 42

IC MCU 8BIT 1K RAM 68-PLCC

MCHC11F1CFNE3

Manufacturer Part Number
MCHC11F1CFNE3
Description
IC MCU 8BIT 1K RAM 68-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MCHC11F1CFNE3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
30
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
A/d Inputs
8-Channel, 8-Bit
Eeprom Memory
512 Bytes
Input Output
30
Interface
SCI/SPI
Memory Type
EPROM
Number Of Bits
8
Package Type
68-pin PLCC
Programmable Memory
0 Bytes
Timers
3-16-bit
Voltage, Range
3-5.5 V
Controller Family/series
68HC11
No. Of I/o's
30
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
3MHz
No. Of Timers
1
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC11F
Core
HC11
Data Bus Width
8 bit
Program Memory Size
512 B
Data Ram Size
1 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Size
-
Lead Free Status / Rohs Status
RoHS Compliant part

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4.2.2.2 Bootloader ROM
4.2.2.3 EEPROM
4.2.3 Registers
4-4
During the software-based STOP mode, MCU clocks are stopped, but the MCU con-
tinues to draw power from V
ating frequency in CMOS integrated circuits and there is very little leakage when the
clocks are stopped. These two factors reduce power consumption while the MCU is in
STOP mode.
To reduce power consumption to a minimum, V
V
ond power supply. Although this method requires external hardware, it is very effec-
tive. Refer to SECTION 2 PIN DESCRIPTIONS for information about how to connect
the standby RAM power supply. Refer to SECTION 5 RESETS AND INTERRUPTS
for a description of low power operation.
The bootloader ROM is enabled at address $BF00–$BFFF during special bootstrap
mode. The reset vector is fetched from this ROM and the MCU executes the bootload-
er firmware. In normal modes, the bootloader ROM is disabled.
The MC68HC11F1 contains 512 bytes of electrically erasable programmable read-
only memory (EEPROM). The default location for EEPROM is $FE00–$FFFF. Other
locations can be chosen according to the values written to EE[3:0] in the CONFIG reg-
ister. In single-chip and bootstrap modes, the EEPROM is forced on and located at the
default position. In these modes, the EEPROM cannot be remapped. In special test
mode, the EEPROM is disabled initially.
Table 4-1, a summary of registers and control bits, the registers are shown in ascend-
ing order within the 96-byte register block. The addresses shown are for default block
mapping ($1000–$105F), however, the register block can be remapped to any 4-Kbyte
page ($x000–$x05F) by the INIT register.
STBY
pin can be used to supply RAM power from either a battery back-up or a sec-
Figure 4-2 RAM Standby MODB/V
4.8 V
NiCd
Freescale Semiconductor, Inc.
OPERATING MODES AND ON-CHIP MEMORY
V
DD
For More Information On This Product,
+
DD
Go to: www.freescale.com
V
V
BATT
DD
. Power supply current is directly proportional to oper-
MAX
690
V
OUT
4.7 k
DD
STBY
can be turned off, and the MODB/
TO MODB/V
OF M68HC11
Connections
STBY
TECHNICAL DATA
MC68HC11F1

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