M37542F8FP Renesas Electronics America, M37542F8FP Datasheet - Page 68

• Manufacturer Part Number: M37542F8FP
• Description: IC 740 MCU FLASH 32K 36SSOP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M37542F8FP

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SIO, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

7542 Group
The oscillation stop detection circuit is used to detect an oscilla-
tion stop when a ceramic resonator or oscillation circuit stops due
to disconnection. To use the oscillation stop detection circuit, set
the on-chip oscillator to start operating.
The oscillation stop detection circuit is enabled by setting the Ce-
ramic or RC oscillation stop detection function active bit to 1.
While this circuit is enabled, the operating status of the Ceramic or
RC oscillation circuit is monitored using the on-chip oscillator. If an
oscillation stop is detected, the oscillation stop detection status bit
is set to 1. If the oscillation stop detection reset enable bit is also
set to 1, an internal reset is triggered at oscillation stop detection.
The Ceramic or RC oscillation stop detection function active bit
and the oscillation stop detection status bit are not initialized if an
oscillation stop detection reset is triggered and these bits retain
their value of 1. Since these bits are initialized to 0 by an external
reset, an oscillation stop detection reset can be determined by
checking the oscillation stop status bit.
The oscillation stop detection status bit is set to 0 by writing 0 to
the Ceramic or RC oscillation stop detection function active bit.
To enable the oscillation detection circuit, first write 0 to the Ce-
ramic or RC oscillation stop detection function active bit and set
the oscillation stop detection status bit to 0. Then set the Ceramic
or RC oscillation stop detection function active bit to 1.
The Ceramic oscillation, RC oscillation, and external clock input
are set as the clocks for oscillation stop detection. Refer to the
electrical characteristics for the frequencies for oscillation stop de-
tection.
(1) Do not execute the transition to “state 2’a” shown in Figure 86
(2) After an oscillation stop detection reset, if this reset is enabled
(3) The oscillation stop detection status bit is initialized under the
(4) While the oscillation stop detection function is in active, the os-
(5) The oscillation stop detection circuit is not included in the emu-
Rev.3.03
REJ03B0006-0303
Notes on Oscillation Stop Detection Circuit
Oscillation stop detection circuit
State transition of oscillation stop detection circuit. In this state,
no reset is triggered and the MCU is stopped even when the
X
while bits Ceramic or RC oscillation stop detection function ac-
tive and oscillation stop detection status are retained, a reset
is triggered again.
following conditions:
• External reset, power-on reset, low-voltage detection reset,
• Write 0 to the Ceramic or RC oscillation stop detection func-
cillation stop detection status bit may set to 1 when the
watchdog timer underflow.
When an oscillation stop detection reset is triggered, reconfirm
that oscillation is stopped.
lator MCU “M37542RSS”.
IN
watchdog timer reset, and reset by the STP instruction func-
tion.
tion active Bit.
oscillation is stopped.
Jul 11, 2008
Page 66 of 117
Fig. 85 Structure of MISRG
b7
b0
Ceramic or RC oscillation stop
detection function active bit
0: Detection function inactive
1: Detection function active
Not used (return “0” when read)
Oscillation stop reset bit
0: Oscillation stop reset disabled
1: Oscillation stop reset enabled
Oscillation stabilization time set bit after
release of the STP instruction
Oscillation stop detection status bit
0: Oscillation stop not detected
1: Oscillation stop detected
Reserved bits
(Do not write “1” to these bits)
0: Set “01
1: Not set automatically
MISRG(address 0038
in prescaler 1 automatically
16
” in timer1, and “FF
16
, initial value: 00
16
”
16
)