M37542F8FP Renesas Electronics America, M37542F8FP Datasheet - Page 24

IC 740 MCU FLASH 32K 36SSOP

M37542F8FP

Manufacturer Part Number
M37542F8FP
Description
IC 740 MCU FLASH 32K 36SSOP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet

Specifications of M37542F8FP

Core Processor
740
Core Size
8-Bit
Speed
8MHz
Connectivity
SIO, UART/USART
Peripherals
POR, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
36-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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7542 Group
Fig. 21 Block diagram of ports (2)
Rev.3.03
REJ03B0006-0303
*
(8) Port P1
(10) Port P1
When the TTL level is selected, there is no hysteresis characteristics.
(12) Port P1
P1
Data bus
Serial I/O1 enable bit
Data bus
Serial I/O1 synchronous
Data bus
0
Capture 0 input control
Receive enable bit
Serial I/O1 mode selection bit
, P1
Serial I/O1 enable bit
2
clock selection bit
, P1
Jul 11, 2008
Serial I/O1 input
Capture 0 input
0
Serial I/O1 enable bit
3
Serial I/O1 clock output
2
, P3
4
Pulse output mode
6
, and P3
Port latch
Timer output
Direction
register
Port latch
Direction
register
Port latch
Direction
register
7
input level are switched to the CMOS/TTL level by the port P1P3 control register.
Serial I/O1 clock input
CNTR
Page 22 of 117
0
interrupt input
P1
input level
selection bit
0
, P1
*
2
, P1
3
P1
input level
selection bit
0
, P1
2
, P1
*
3
(9) Port P1
Data bus
(13) Ports P2
P1
(11) Port P1
Serial I/O1 mode selection bit
Data bus
1
Data bus
Serial I/O1 enable bit
/T
Transmit enable bit
1
x
D
S
1
RDY1
Serial I/O1 enable bit
P-channel output disable bit
Serial I/O1 output
Port latch
output enable bit
0
Serial I/O1 ready output
–P2
3
Direction
register
7
Port latch
Direction
register
Direction
register
Port latch
A/D converter input
Analog input pin
selection bit
P1
input level
selection bit
0
, P1
2
*
, P1
3

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