MC68HC11F1CFN4 Freescale Semiconductor, MC68HC11F1CFN4 Datasheet - Page 40

• Manufacturer Part Number: MC68HC11F1CFN4
• Description: IC MCU 512 EEPROM 4MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11F1CFN4

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

4.2 On-Chip Memory
4.2.1 Mapping Allocations
4-2
The bootstrap ROM contains a small program which initializes the SCI and allows the
user to download a program of up to 1024 bytes into on-chip RAM. After a four-char-
acter delay, or after receiving the character for address $03FF, control passes to the
loaded program at $0000. An external pull-up resistor is required when using the SCI
transmitter pin (TxD) because port D pins are configured for wired-OR operation by
the bootloader. In bootstrap mode, the interrupt vectors point to RAM. This allows the
use of interrupts through a jump table. Refer to Freescale application note AN1060,
M68HC11 Bootstrap Mode.
The MC68HC11F1 contains 1024 bytes of on-chip RAM and 512 bytes of EEPROM.
The bootloader ROM occupies 256 bytes. The CONFIG register is implemented as a
separate EEPROM byte.
Memory locations for on-chip resources are the same for both expanded and single-
chip modes. The 96-byte register block originates at $1000 after reset and can be
placed at any other 4-Kbyte boundary ($x000) after reset by writing an appropriate val-
ue to the INIT register. Refer to Figure 4-1, which illustrates the memory map.
The on-board 1024-byte RAM is initially located at $0000 after reset. If RAM and reg-
isters are both mapped to the same 4-Kbyte boundary, the first 96 bytes of RAM are
inaccessible (registers have higher priority). Remapping is accomplished by writing
appropriate values to the INIT register.
The 512-byte EEPROM array is initially located at $FE00 after reset when EEPROM
is enabled in the memory map by the CONFIG register. In expanded and special test
modes EEPROM can be placed at any other 4-Kbyte boundary ($xE00) by program-
ming bits EE[3:0] in the CONFIG register to an appropriate value. In single-chip and
bootstrap modes the EEPROM is forced on and cannot be remapped.
In special bootstrap mode, a bootloader ROM is enabled at locations $BF00–$BFFF.
The vectors for special bootstrap mode are contained in the bootloader program. The
boot ROM fills 256 bytes of the memory map even though not all locations are used.
Freescale Semiconductor, Inc.
OPERATING MODES AND ON-CHIP MEMORY
For More Information On This Product,
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TECHNICAL DATA
MC68HC11F1