MC68HC912B32CFU8 Freescale Semiconductor, MC68HC912B32CFU8 Datasheet - Page 199

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MC68HC912B32CFU8

Manufacturer Part Number
MC68HC912B32CFU8
Description
IC MCU 32K FLASH 8MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC68HC912B32CFU8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
63
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
768 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Manufacturer
Quantity
Price
Part Number:
MC68HC912B32CFU8
Manufacturer:
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10 000
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MC68HC912B32CFU8
Manufacturer:
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OR — Overrun Error Flag
NF — Noise Error Flag
FE — Framing Error Flag
PF — Parity Error Flag
14.2.3.5 SCI Status Register 2
Read: Anytime
Write: Has no meaning or effect
RAF — Receiver Active Flag
Freescale Semiconductor
New byte is ready to be transferred from the receive shift register to the receive data register and the
receive data register is already full (RDRF bit is set). Data transfer is inhibited until this bit is cleared.
Set during the same cycle as the RDRF bit but not set in the case of an overrun (OR).
Set when a 0 is detected where a stop bit was expected. Clear the FE flag by reading SC0SR1 with
FE set and then reading SC0DR.
Indicates if received data’s parity matches parity bit. This feature is active only when parity is enabled.
The type of parity tested for is determined by the PT (parity type) bit in SC0CR1.
This bit is controlled by the receiver front end. It is set during the RT1 time period of the start bit search.
It is cleared when an idle state is detected or when the receiver circuitry detects a false start bit
(generally due to noise or baud rate mismatch).
0 = No overrun
1 = Overrun detected
0 = Unanimous decision
1 = Noise on a valid start bit, any of the data bits, or on the stop bit
0 = Stop bit detected
1 = Zero detected rather than a stop bit
0 = Parity correct
1 = Incorrect parity detected
0 = Character is not being received.
1 = Character is being received.
Address:
Reset:
Read:
Write:
$00C5
Bit 7
0
0
Figure 14-8. SCI Status Register 2 (SC0SR2)
= Unimplemented
M68HC12B Family Data Sheet, Rev. 9.1
6
0
0
5
0
0
4
0
0
3
0
0
Serial Communication Interface (SCI)
2
0
0
1
0
0
Bit 0
RAF
0
199

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