MC68HC912B32CFU8 Freescale Semiconductor, MC68HC912B32CFU8 Datasheet - Page 105

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MC68HC912B32CFU8

Manufacturer Part Number
MC68HC912B32CFU8
Description
IC MCU 32K FLASH 8MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HC12r
Datasheet

Specifications of MC68HC912B32CFU8

Core Processor
CPU12
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
63
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
768 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC912B32CFU8
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68HC912B32CFU8
Manufacturer:
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Quantity:
20 000
8.5 Programming the FLASH EEPROM
Programming the FLASH EEPROM is accomplished by this step-by-step procedure. The V
must be at the proper level prior to executing step 4 the first time.
The flowchart in
Freescale Semiconductor
10. If the location is programmed, repeat the same number of pulses as required to program the
11. Read the address location to verify that it remains programmed.
12. Clear LAT.
13. If there are more locations to program, repeat steps 2 through 10.
14. Turn off V
1. Apply program/erase voltage to the V
2. Clear ERAS and set the LAT bit in the FEECTL register to establish program mode and enable
3. Write data to a valid address. The address and data are latched. If BOOTP is asserted, an attempt
4. Apply programming voltage by setting ENPE.
5. Delay for one programming pulse, t
6. Remove programming voltage by clearing ENPE.
7. Delay while high voltage is turning off, t
8. Read the address location to verify that it has been programmed,
9. If the location is not programmed, repeat steps 4 through 7 until the location is programmed or until
programming address and data latches.
to program an address in the boot block will be ignored.
the specified maximum number of program pulses, n
location. This provides 100 percent program margin.
FP
Figure 8-5
. Reduce voltage on V
demonstrates the recommended programming sequence.
M68HC12B Family Data Sheet, Rev. 9.1
FP
PPULSE
FP
pin to V
VPROG
pin.
.
DD
.
.
PP
, has been reached.
Programming the FLASH EEPROM
FP
pin voltage
105

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