AT80C51SND1C-ROTUL Atmel, AT80C51SND1C-ROTUL Datasheet - Page 209

• Manufacturer Part Number: AT80C51SND1C-ROTUL
• Description: IC MCU FLASH MP3 DECODER 80-TQFP
• Manufacturer: Atmel
• Series: 80Cr

Specifications of AT80C51SND1C-ROTUL

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
• Peripherals: Audio, I²S, MP3, PCM, POR, WDT
• Number Of I /o: 44
• Program Memory Type: ROMless
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

27. Table of Contents
4109L–8051–02/08
1
2
3
4
5
6
7
8
9
Description ............................................................................................... 2
Typical Applications ................................................................................ 2
Block Diagram .......................................................................................... 3
Pin Description ......................................................................................... 4
Clock Controller ..................................................................................... 13
Program/Code Memory ......................................................................... 18
Data Memory .......................................................................................... 26
Special Function Registers ................................................................... 33
Interrupt System .................................................................................... 39
4.1 Pinouts ....................................................................................................................4
4.2 Signals .....................................................................................................................6
4.3 Internal Pin Structure .............................................................................................12
5.1 Oscillator ...............................................................................................................13
5.2 X2 Feature .............................................................................................................13
5.3 PLL ........................................................................................................................14
5.4 Registers ...............................................................................................................16
6.1 ROMLESS Memory Architecture ...........................................................................18
6.2 ROM Memory Architecture ....................................................................................20
6.3 Flash Memory Architecture ...................................................................................20
6.4 Hardware Security System ....................................................................................21
6.5 Boot Memory Execution ........................................................................................22
6.6 Preventing Flash Corruption ..................................................................................23
6.7 Registers ...............................................................................................................23
6.8 Hardware Bytes .....................................................................................................24
7.1 Internal Space .......................................................................................................26
7.2 External Space ......................................................................................................27
7.3 Dual Data Pointer ..................................................................................................29
7.4 Registers ...............................................................................................................31
9.1 Interrupt System Priorities .....................................................................................39
9.2 External Interrupts .................................................................................................42
9.3 Registers ...............................................................................................................43
AT8xC51SND1C
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