AT80C51SND1C-ROTUL Atmel, AT80C51SND1C-ROTUL Datasheet - Page 156

IC MCU FLASH MP3 DECODER 80-TQFP

AT80C51SND1C-ROTUL

Manufacturer Part Number
AT80C51SND1C-ROTUL
Description
IC MCU FLASH MP3 DECODER 80-TQFP
Manufacturer
Atmel
Series
80Cr
Datasheet

Specifications of AT80C51SND1C-ROTUL

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Type
ROMless
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

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Part Number:
AT80C51SND1C-ROTUL
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19.4
156
Registers
AT8xC51SND1C
Figure 19-12. Slave SPI Interrupt Policy Flows
Table 133. SPCON Register
SPCON (S:C3h) – SPI Control Register
Number
SPR2
Bit
7
7
6
5
4
3
2
program CPOL & CPHA
Mnemonic Description
write data in SPDAT
SPI Initialization
Select Slave Mode
Interrupt Policy
Prepare Transfer
Enable interrupt
SSDIS
SPEN
SPEN
MSTR
CPOL
CPHA
SPR2
Select Format
Bit
Enable SPI
6
MSTR = 0
SPEN = 1
ESPI =1
SPI Rate Bit 2
Refer to Table 132 for bit rate description.
SPI Enable Bit
Set to enable the SPI interface.
Clear to disable the SPI interface.
Slave Select Input Disable Bit
Set to disable SS in both master and slave modes. In slave mode this bit has no
effect if CPHA = 0.
Clear to enable SS in both master and slave modes.
Master Mode Select
Set to select the master mode.
Clear to select the slave mode.
SPI Clock Polarity Bit
Set to have the clock output set to high level in idle state.
Clear to have the clock output set to low level in idle state.
SPI Clock Phase Bit
Set to have the data sampled when the clock returns to idle state (see CPOL).
Clear to have the data sampled when the clock leaves the idle state (see CPOL).
SSDIS
5
MSTR
4
(1)
CPOL
3
Prepare New Transfer
write data in SPDAT
Service Routine
Get Data Received
SPI Interrupt
Read SPSTA
read SPDAT
Get Status
CPHA
2
SPR1
1
4109L–8051–02/08
SPR0
0

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