ACE1202LEM8X Fairchild Semiconductor, ACE1202LEM8X Datasheet - Page 22

• Manufacturer Part Number: ACE1202LEM8X
• Description: IC MCU 2KBIT EEPROM 8SOIC
• Manufacturer: Fairchild Semiconductor
• Series: ACEX® 12xxr

Specifications of ACE1202LEM8X

• Core Processor: ACE1202
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: EEPROM
• Eeprom Size: 64 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Connectivity: -

ACE1202 Product Family Rev. B.1
In the Input Capture mode, the timer is used to measure elapsed time
between edges of an input signal. Once the timer is configured for this
mode, the timer starts counting down immediately at the instruction
clock rate. The Timer 1 will then transfer the current value of the TMR1
register into the T1RA register as soon as the selected edge of T1 is
sensed. The input signal on T1 must have a pulse width equal to or
greater than one instruction clock cycle. At every T1RA capture,
software can then store the values into RAM to calculate the elapsed
time between edges on T1. At any given time (with proper consider-
ation of the state of T1) the timer can be configured to capture on
positive-going or negative-going edges. A block diagram of the
timer’s Input Capture mode of operation is shown in Figure 17.
The timer has one interrupt (TMRI1) that is maskable through the
T1EN bit of the T1CNTRL register. However, the core is only
interrupted if the T1EN bit and the G (Global Interrupt enable) bit of the
SR is set. The Input Capture mode contains two interrupt pending
flags 1) the TMR1 register capture in T1RA (T1PND) and 2) timer
underflow (T1C0). If interrupts are enabled, the timer will generate an
interrupt each time a pending flag is set (provided that the pending flag
was previously cleared.) The interrupt service routine is responsible
for proper handling of the T1PND flag, T1C0 flag, and the T1EN bit.
For this operating mode, the T1C0 control bit serves as the timer
underflow interrupt pending flag. The Timer 1 interrupt service
routine must read both the T1PND and T1C0 flags to determine the
cause of the interrupt. A set T1C0 flag means that a timer underflow
occurred whereas a set T1PND flag means that a capture occurred
in T1RA. It is possible that both flags will be found set, meaning that
both events occurred at the same time. The interrupt service routine
should take this possibility into consideration.
Because the T1C0 bit is used as the underflow interrupt pending
flag, it is not available for use as a start/stop bit as in the other modes.
The TMR1 register counts down continuously at the instruction
clock rate starting from the time that the input capture mode is
selected. (See Table 12 and 13) To stop the timer from running,
you must change the mode to an alternate mode (PWM or
External Event Counter) while resetting the T1C0 bit.
The input pins can be independently configured to sense positive-
going or negative-going transitions. The edge sensitivity of pin T1
is controlled by bit T1C1 as indicated in Table 13.
The edge sensitivity of a pin can be changed without leaving the
input capture mode even while the timer is running. This feature
allows you to measure the width of a pulse received on an input pin.
Underflow
Interrupt
T1
Interrupt
Capture
Edge Selector
Logic
Instruction
Clock
16-bit Timer (TMR1)
16-bit Input Capture
Register (T1RA)
For example, the T1 pin can be programmed to be sensitive to a
positive-going edge. When the positive edge is sensed, the TMR1
register contents is transferred to the T1RA register and a Timer 1
interrupt is generated. The Timer 1 interrupt service routine records
the contents of the T1RA register, changes the edge sensitivity from
positive to negative-going edge, and clears the T1PND flag. When the
negative-going edge is sensed another Timer 1 interrupt is generated.
The interrupt service routine reads the T1RA register again. The
difference between the previous reading and the current reading
reflects the elapsed time between the positive edge and negative
edge of the T1 input signal i.e. the width of the positive-going pulse.
Remember that the Timer1 interrupt service routine must test the
T1C0 and T1PND flags to determine the cause of the interrupt. If the
T1C0 flag caused the interrupt, the interrupt service routine should
record the occurrence of an underflow by incrementing a counter in
memory or by some other means. The software that calculates the
elapsed time between captures should take into account the
number of underflow that occurred when making its calculation.
The following steps show how to properly configure Timer 1 to
operate in the Input Capture mode.
1. Configure T1 as an input by clearing bit 2 of PORTGC.
2. Initialize T1 to input with pull-up by setting bit 2 of PORTGD.
3. Enable the global interrupt enable bit.
4. With the timer stopped, load the initial time into the TMR1
5. Write the appropriate control value to the T1CNTRL register
6. As soon as the input capture mode is enabled, the timer
- RBIT 2, PORTGC
- SBIT 2, PORTGD
- SBIT 4, STATUS
register (typically the value is 0xFFFF.)
- LD TMR1LO, #0FFH
- LD TMR1HI, #00H
to select Input Capture mode, to sense the appropriate edge,
to set the enable bit, and to clear the pending flags. (See
Table 12 and 13)
- LD T1CNTRL, #64H
starts counting. When the selected edge is sensed on T1,
the T1RA register is loaded and a Timer 1 interrupt is
triggered.
Data
Bus
; Configure G2 as an input
; Set G2 high
; T1C1 is the edge select bit
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