ACE1101BEMT8 Fairchild Semiconductor, ACE1101BEMT8 Datasheet - Page 28

• Manufacturer Part Number: ACE1101BEMT8
• Description: IC MCU 1KBIT EEPROM 8TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: ACEX® 11xxr

Specifications of ACE1101BEMT8

• Core Processor: ACE1001
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: EEPROM
• Eeprom Size: 64 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Connectivity: -

ACE1101 Product Family Rev. B.2
The Brown-out Reset (BOR) and Low Battery Detect (LBD)
circuits on the ACEx microcontroller have been designed to offer
two types of voltage reference comparators. The sections below
will describe the functionality of both circuits.
The Brown-out Reset (BOR) function is used to hold the device in
reset when V
cal Characteristics for threshold voltage.) While in reset, the
device is held in its initial condition until V
threshold value. Shortly after V
an internal reset sequence is started. After the reset sequence, the
core fetches the first instruction and starts normal operation.
On the devices, the BOR should be used in situations when V
rises and falls slowly and in situations when V
zero before rising back to operating range. The Brown-out Reset
Adjust Reference Voltage
7
Bit 7
1.8V
2.2V
6
CC
BLSEL
0
1
S
5
drops below a fixed threshold. (See BOR Electri-
16
Bat_trim[2:0]
4
Bit 6
Vcc
3
CC
1
2
3
4
5
6
7
8
_
+
_
+
rises above the threshold value,
BOR
LBD
2
Bit 5
1
CC
CC
0
0
0
0
1
1
1
1
rises above the
0
does not fall to
to RESET logic
Register
Control
LBD
Bit 4
X
CC
0
0
1
1
0
0
1
1
can be thought of as a supplement function to the Power-on Reset
when V
works best when V
applications where V
device stability.
The BOR circuit must be enabled through the BOR enable bit
(BOREN) in the initialization register. The BOREN bit can only be
set while the device is in programming mode. Once set, the BOR
will always be powered-up enabled. Software cannot disable the
BOR. The BOR can only be disabled in programming mode by
resetting the BOREN bit as long as the global write protect (WDIS)
feature is not enabled.
The Low Battery Detect (LBD) circuit allows software to monitor
the V
software programmable voltage reference threshold that can be
changed on the fly. Once V
the LBD flag in the LBD control register is set. The LBD flag will
hold its value until V
The LBD bit is read only. If LBD is 0, it indicates that the V
is higher than the selected threshold. If LBD is 1, it indicates that
the V
can be adjusted up to eight levels using the three trim bits
(Bat_trim[2:0]) of the LBD control register. The LBD flag does not
cause any hardware actions or an interruption of the processor. It
is for software monitoring only.
The LBD function is disabled during HALT/IDLE mode. After
exiting HALT/IDLE, software must wait at lease 10 µs before
reading the LBD bit to ensure that the internal circuit has stabi-
lized.
16
17
See Figure 14 for information on BLSEL.
BOR is not available on the ACE1101B device.
Bit 3
CC
CC
X
CC
level is below the selected threshold. The threshold level
level at the lower voltage ranges. LBD has an eight level
does not fall below ~1.5V. The Power-on Reset circuit
0
1
0
1
0
1
0
1
CC
Bit 2
CC
CC
X
starts from zero and rises sharply. So in
rises above the threshold. (See Table 16)
is not constant, the BOR will give added
CC
2.9 - 3.0
2.8 - 2.9
2.7 - 2.8
2.6 - 2.7
2.5 - 2.6
2.4 - 2.5
2.3 - 2.4
2.2 - 2.3
falls below the selected threshold,
±
Bit 1
X
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Bit 0
LBD
CC
level