DSPIC30F3010T-20I/SO Microchip Technology, DSPIC30F3010T-20I/SO Datasheet - Page 49

IC DSPIC MCU/DSP 24K 28SOIC

DSPIC30F3010T-20I/SO

Manufacturer Part Number
DSPIC30F3010T-20I/SO
Description
IC DSPIC MCU/DSP 24K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3010T-20I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.0
The dsPIC30F family of devices contains internal
program Flash memory for executing user code. There
are two methods by which the user can program this
memory:
1.
2.
6.1
dsPIC30F devices can be serially programmed while in
the end application circuit. This is simply done with two
lines for Programming Clock and Programming Data
(which are named PGC and PGD respectively), and
three other lines for Power (V
Master Clear (MCLR). this allows customers to manu-
facture boards with unprogrammed devices, and then
program the microcontroller just before shipping the
product. This also allows the most recent firmware or a
custom firmware to be programmed.
FIGURE 6-1:
© 2005 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the dsPIC30F Family Reference
Manual (DS70046). For more information on the device
instruction set and programming, refer to the dsPIC30F
Programmer’s Reference Manual (DS70030).
In-Circuit Serial Programming™ (ICSP™)
Run Time Self-Programming (RTSP)
FLASH PROGRAM MEMORY
In-Circuit Serial Programming
(ICSP)
User/Configuration
Space Select
ADDRESSING FOR TABLE AND NVM REGISTERS
DD
Using
NVMADR
Addressing
Using
Table
Instruction
), Ground (V
Using
Program
Counter
1/0
1/0
0
SS
) and
TBLPAG Reg
NVMADRU Reg
Preliminary
8 bits
8 bits
Program Counter
6.2
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions.
With RTSP, the user may erase program memory, 32
instructions (96 bytes) at a time and can write program
memory data, 32 instructions (96 bytes) at a time.
6.3
The TBLRDL and the TBLWTL instructions are used to
read or write to bits <15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
Word or Byte mode.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can access program memory in Word or
Byte mode.
A 24-bit program memory address is formed using
bits<7:0> of the TBLPAG register and the effective
address (EA) from a W register specified in the table
instruction, as shown in Figure 6-1.
24 bits
24-bit EA
dsPIC30F3010/3011
NVMADR Reg EA
Working Reg EA
Run Time Self-Programming
(RTSP)
Table Instruction Operation Summary
16 bits
16 bits
0
Byte
Select
DS70141B-page 47

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