DSPIC30F3010T-20I/SO Microchip Technology, DSPIC30F3010T-20I/SO Datasheet - Page 212

• Manufacturer Part Number: DSPIC30F3010T-20I/SO
• Description: IC DSPIC MCU/DSP 24K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3010T-20I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC30F3010/3011
Program and EEPROM Characteristics ............................ 166
Program Counter................................................................. 16
Program Data Table Access ............................................... 26
Program Space Visibility
Programmable................................................................... 129
Programmable Digital Noise Filters..................................... 87
Programmer’s Model........................................................... 16
Programming Operations .................................................... 49
Protection Against Accidental Writes to OSCCON ........... 134
PWM
PWM Duty Cycle Comparison Units ................................... 95
PWM Fault Pins .................................................................. 98
PWM Operation During CPU Idle Mode.............................. 99
PWM Operation During CPU Sleep Mode .......................... 99
PWM Output and Polarity Control ....................................... 98
PWM Output Override......................................................... 97
PWM Period ........................................................................ 94
PWM Special Event Trigger ................................................ 99
PWM Time Base ................................................................. 93
PWM Update Lockout ......................................................... 99
Q
QEA/QEB Input Characteristics ........................................ 181
QEI Module
Quadrature Decoder Timing Requirements ...................... 181
Quadrature Encoder Interface (QEI) Module ...................... 85
Quadrature Encoder Interface Interrupts ............................ 88
Quadrature Encoder Interface Logic ................................... 86
DS70141B-page 210
Table Instructions
Window into Program Space Operation...................... 27
Diagram ...................................................................... 17
Algorithm for Program Flash ....................................... 49
Erasing a Row of Program Memory ............................ 49
Initiating the Programming Sequence ......................... 50
Loading Write Latches ................................................ 50
Register Map............................................................. 100
Duty Cycle Register Buffers ........................................ 95
Enable Bits.................................................................. 98
Fault States ................................................................. 98
Modes ......................................................................... 98
Output Pin Control ...................................................... 98
Complementary Output Mode ..................................... 97
Synchronization .......................................................... 97
Postscaler ................................................................... 99
Continuous Up/Down Counting Modes ....................... 93
Double Update Mode .................................................. 94
Free Running Mode .................................................... 93
Postscaler ................................................................... 94
Prescaler ..................................................................... 94
Single Shot Mode........................................................ 93
External Clock Timing Requirements........................ 177
Index Pulse Timing Characteristics........................... 182
Index Pulse Timing Requirements ............................ 182
Operation During CPU Idle Mode ............................... 88
Operation During CPU Sleep Mode ............................ 87
Register Map............................................................... 89
Timer Operation During CPU Idle Mode ..................... 88
Timer Operation During CPU Sleep Mode.................. 87
TBLRDH.............................................................. 25
TBLRDL .............................................................. 25
TBLWTH ............................................................. 25
TBLWTL.............................................................. 25
Cycle-by-Cycle.................................................... 98
Latched ............................................................... 98
Preliminary
R
Reset ........................................................................ 129, 135
Reset Sequence ................................................................. 43
Reset Timing Characteristics............................................ 173
Reset Timing Requirements ............................................. 174
Resets
S
Simple Capture Event Mode
Simple OC/PWM Mode Timing Requirements ................. 179
Simple Output Compare Match Mode ................................ 82
Simple PWM Mode ............................................................. 82
Single Pulse PWM Operation ............................................. 97
Software Simulator (MPLAB SIM) .................................... 152
Software Simulator (MPLAB SIM30) ................................ 152
Software Stack Pointer, Frame Pointer .............................. 16
SPI Mode
SPI Module ....................................................................... 101
SPI Operation During CPU Idle Mode .............................. 103
SPI Operation During CPU Sleep Mode........................... 103
Status Register ................................................................... 16
Symbols Used in Opcode Descriptions ............................ 144
System Integration............................................................ 129
T
Temperature and Voltage Specifications
Timer1 Module.................................................................... 63
Reset Sources ............................................................ 43
BOR, Programmable ................................................ 137
POR .......................................................................... 135
POR with Long Crystal Start-up Time....................... 137
POR, Operating without FSCM and PWRT .............. 137
Capture Buffer Operation............................................ 78
Capture Prescaler....................................................... 78
Hall Sensor Mode ....................................................... 78
Input Capture in CPU Idle Mode................................. 79
Timer2 and Timer3 Selection Mode............................ 78
Input Pin Fault Protection ........................................... 82
Period ......................................................................... 83
CALL Stack Frame ..................................................... 31
Slave Select Synchronization ................................... 103
SPI1 Register Map.................................................... 104
Framed SPI Support ................................................. 101
Operating Function Description ................................ 101
SDOx Disable ........................................................... 101
Timing Characteristics
Timing Requirements
Word and Byte Communication ................................ 101
Overview................................................................... 129
Register Map ............................................................ 142
AC............................................................................. 167
DC ............................................................................ 157
16-bit Asynchronous Counter Mode ........................... 63
16-bit Synchronous Counter Mode ............................. 63
16-bit Timer Mode....................................................... 63
Gate Operation ........................................................... 64
Interrupt ...................................................................... 65
Operation During Sleep Mode .................................... 64
Master Mode (CKE = 0).................................... 183
Master Mode (CKE = 1).................................... 184
Slave Mode (CKE = 1).............................. 185, 186
Master Mode (CKE = 0).................................... 183
Master Mode (CKE = 1).................................... 184
Slave Mode (CKE = 0)...................................... 185
Slave Mode (CKE = 1)...................................... 187
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