DSPIC30F3010T-20I/SO Microchip Technology, DSPIC30F3010T-20I/SO Datasheet - Page 213

• Manufacturer Part Number: DSPIC30F3010T-20I/SO
• Description: IC DSPIC MCU/DSP 24K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3010T-20I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timer2 and Timer3 Selection Mode .................................... 82
Timer2/3 Module ................................................................. 67
Timer4/5 Module ................................................................. 73
TimerQ (QEI Module) External Clock Timing
Timing Characteristics
Timing Diagrams
© 2005 Microchip Technology Inc.
Prescaler..................................................................... 64
Real-Time Clock ......................................................... 65
Register Map............................................................... 66
32-bit Synchronous Counter Mode ............................. 67
32-bit Timer Mode....................................................... 67
ADC Event Trigger...................................................... 70
Gate Operation ........................................................... 70
Interrupt....................................................................... 70
Operation During Sleep Mode .................................... 70
Register Map............................................................... 71
Timer Prescaler........................................................... 70
Register Map............................................................... 76
Characteristics .......................................................... 177
A/D Conversion
Bandgap Start-up Time............................................. 174
CAN Module I/O........................................................ 192
CLKOUT and I/O....................................................... 172
External Clock........................................................... 167
I
I
Input Capture (CAPX) ............................................... 178
Motor Control PWM Module...................................... 180
Motor Control PWM Module Falult............................ 180
OC/PWM Module ...................................................... 179
Oscillator Start-up Timer ........................................... 173
Output Compare Module........................................... 178
Power-up Timer ........................................................ 173
QEI Module Index Pulse ........................................... 182
Reset......................................................................... 173
SPI Module
TimerQ (QEI Module) External Clock ....................... 177
Type 1, 2, 3, 4 and 5 Timer External Clock............... 175
Watchdog Timer........................................................ 173
Center Aligned PWM .................................................. 95
Dead-Time .................................................................. 96
Edge Aligned PWM..................................................... 94
PWM Output ............................................................... 83
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
2
2
C Bus Data
C Bus Start/Stop Bits
RTC Interrupts .................................................... 65
RTC Oscillator Operation.................................... 65
10-Bit High-speed (CHPS = 01,
10-Bit High-speed (CHPS = 01,
Master Mode ..................................................... 188
Slave Mode ....................................................... 190
Master Mode ..................................................... 188
Slave Mode ....................................................... 190
Master Mode (CKE = 0) .................................... 183
Master Mode (CKE = 1) .................................... 184
Slave Mode (CKE = 0) ...................................... 185
Slave Mode (CKE = 1) ...................................... 186
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
SIMSAM = 0, ASAM = 0,
SSRC = 000) ............................................ 195
SIMSAM = 0, ASAM = 1,
SSRC = 111, SAMC = 00001) .................. 196
DD
).......................................... 136
DD
DD
), Case 1...................... 136
), Case 2...................... 136
Preliminary
Timing Diagrams and Specifications
Timing Diagrams.See Timing Characteristics
Timing Requirements
Timing Specifications
Trap Vectors ....................................................................... 44
U
UART
dsPIC30F3010/3011
DC Characteristics - Internal RC Accuracy .............. 169
A/D Conversion
Bandgap Start-up Time ............................................ 175
Brown-out Reset....................................................... 174
CAN Module I/O ....................................................... 192
CLKOUT and I/O ...................................................... 172
External Clock .......................................................... 168
I
I
Input Capture............................................................ 178
Motor Control PWM Module ..................................... 180
Oscillator Start-up Timer........................................... 174
Output Compare Module .......................................... 178
Power-up Timer ........................................................ 174
QEI Module
Quadrature Decoder................................................. 181
Reset ........................................................................ 174
Simple OC/PWM Mode ............................................ 179
SPI Module
Timer1 External Clock .............................................. 176
Timer3 and Timer5 External Clock ................... 176, 177
Watchdog Timer ....................................................... 174
PLL Clock ................................................................. 169
Address Detect Mode ............................................... 117
Auto Baud Support ................................................... 118
Baud Rate Generator ............................................... 117
Enabling and Setting Up UART ................................ 115
Loopback Mode ........................................................ 117
Module Overview...................................................... 113
Operation During CPU Sleep and Idle Modes.......... 118
Receiving Data ......................................................... 116
Reception Error Handling ......................................... 116
Transmitting Data ..................................................... 115
2
2
C Bus Data (Master Mode) .................................... 189
C Bus Data (Slave Mode) ...................................... 191
10-Bit High-speed............................................. 197
External Clock .................................................. 177
Index Pulse....................................................... 182
Master Mode (CKE = 0).................................... 183
Master Mode (CKE = 1).................................... 184
Slave Mode (CKE = 0)...................................... 185
Slave Mode (CKE = 1)...................................... 187
Alternate I/O ..................................................... 115
Disabling........................................................... 115
Enabling ........................................................... 115
Setting Up Data, Parity and Stop Bit
In 8-bit or 9-bit Data Mode................................ 116
Interrupt ............................................................ 116
Receive Buffer (UxRCB)................................... 116
Framing Error (FERR) ...................................... 117
Idle Status ........................................................ 117
Parity Error (PERR) .......................................... 117
Receive Break .................................................. 117
Receive Buffer Overrun Error (OERR Bit) ........ 116
In 8-bit Data Mode ............................................ 115
In 9-bit Data Mode ............................................ 115
Interrupt ............................................................ 116
Transmit Buffer (UxTXB) .................................. 115
Selections................................................. 115
DS70141B-page 211