AT89C5132-ROTIL Atmel, AT89C5132-ROTIL Datasheet - Page 117

• Manufacturer Part Number: AT89C5132-ROTIL
• Description: IC 8051 MCU FLASH 64K USB 80TQFP
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5132-ROTIL

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
• Peripherals: I²S, POR, WDT
• Number Of I /o: 44
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 2x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4173E–USB–09/07
SCON (S:98h) – Serial Control Register
Reset Value = 0000 0000b
Table 92. SBUF Register
SBUF (S:99h) – Serial Buffer Register
Reset value = XXXX XXXXb
Bit Number
Bit Number
FE/SM0
SD7
7 - 0
7
7
6
5
4
3
2
1
0
7
Mnemonic
Mnemonic
OVR/SM1
SD7:0
REN
SM0
SM1
SM2
RB8
SD6
TB8
Bit
FE
Bit
TI
RI
6
6
Description
Framing Error Bit
To select this function, set SMOD0 bit in PCON register.
Set by hardware to indicate an invalid stop bit.
Must be cleared by software.
Serial Port Mode Bit 0
Refer to Table 89 for mode selection.
Serial Port Mode Bit 1
Refer to Table 89 for mode selection.
Serial Port Mode Bit 2
Set to enable the multiprocessor communication and automatic address recognition
features.
Clear to disable the multiprocessor communication and automatic address recognition
features.
Receiver Enable Bit
Set to enable reception.
Clear to disable reception.
Transmit Bit 8
Modes 0 and 1: Not used.
Modes 2 and 3: Software writes the ninth data bit to be transmitted to TB8.
Receiver Bit 8
Mode 0: Not used.
Mode 1 (SM2 cleared): Set or cleared by hardware to reflect the stop bit received.
Modes 2 and 3 (SM2 set): Set or cleared by hardware to reflect the ninth bit received.
Transmit Interrupt Flag
Set by the transmitter after the last data bit is transmitted.
Must be cleared by software.
Receive Interrupt Flag
Set by the receiver after the stop bit of a frame has been received.
Must be cleared by software.
Description
Serial Data Byte
Read the last data received by the Serial I/O Port.
Write the data to be transmitted by the Serial I/O Port.
SM2
SD5
5
5
REN
SD4
4
4
SD3
TB8
3
3
RB8
SD2
2
2
AT89C5132
SD1
TI
1
1
SD0
RI
0
0
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