DSPIC30F2010-30I/SO Microchip Technology, DSPIC30F2010-30I/SO Datasheet - Page 86

• Manufacturer Part Number: DSPIC30F2010-30I/SO
• Description: IC DSPIC MCU/DSP 12K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 20
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification

dsPIC30F2010
14.1.4
In the Double Update mode (PTMOD<1:0> = 11), an
interrupt event is generated each time the PTMR
register is equal to zero, as well as each time a period
match occurs. The postscaler selection bits have no
effect in this mode of the timer.
The Double Update mode provides two additional
functions to the user. First, the control loop bandwidth
is doubled because the PWM duty cycles can be
updated, twice per period. Second, asymmetrical
center-aligned PWM waveforms can be generated,
which are useful for minimizing output waveform
distortion in certain motor control applications.
14.1.5
The input clock to PTMR (F
options of 1:1, 1:4, 1:16 or 1:64, selected by control bits
PTCKPS<1:0> in the PTCON SFR. The prescaler
counter is cleared when any of the following occurs:
• a write to the PTMR register
• a write to the PTCON register
• any device Reset
The PTMR register is not cleared when PTCON is
written.
14.1.6
The match output of PTMR can optionally be
post-scaled through a 4-bit postscaler (which gives a
1:1 to 1:16 scaling).
The postscaler counter is cleared when any of the
following occurs:
• a write to the PTMR register
• a write to the PTCON register
• any device Reset
The PTMR register is not cleared when PTCON is
written.
DS70118H-page 86
Note:
DOUBLE UPDATE MODE
Programming a value of 0x0001 in the
period
continuous interrupt pulse, and hence,
must be avoided.
PWM TIME BASE PRESCALER
PWM TIME BASE POSTSCALER
register
OSC
could
/4), has prescaler
generate
a
14.2
PTPER is a 15-bit register and is used to set the
counting period for the PWM time base. PTPER is a
double-buffered register. The PTPER buffer contents
are loaded into the PTPER register at the following
instances:
• Free Running and Single Shot modes: When the
• Up/Down Counting modes: When the PTMR
The value held in the PTPER buffer is automatically
loaded into the PTPER register when the PWM time
base is disabled (PTEN = 0).
The
Equation 14-1:
EQUATION 14-1:
If the PWM time base is configured for one of the
Up/Down Count modes, the PWM period is found using
Equation 14-2.
EQUATION 14-2:
The maximum resolution (in bits) for a given device
oscillator and PWM frequency can be determined using
Equation 14-3:
EQUATION 14-3:
PTMR register is reset to zero after a match with
the PTPER register.
register is zero.
PWM
Resolution =
PWM Period
T
T
PWM
PWM
period
=
=
(PTMR Prescale Value)
T
(PTMR Prescale Value)
CY
T
PWM PERIOD
PWM PERIOD (UP/DOWN
COUNT MODE)
PWM RESOLUTION
CY
can
© 2008 Microchip Technology Inc.
log (2
•
•
2
(PTPER + 1)
•
log (2)
be
(PTPER + 0.75)
•
T
PWM
determined
/ T
CY
)
using