DSPIC30F2010-30I/SO Microchip Technology, DSPIC30F2010-30I/SO Datasheet - Page 15

• Manufacturer Part Number: DSPIC30F2010-30I/SO
• Description: IC DSPIC MCU/DSP 12K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 20
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification

2.4
The DSP engine consists of a high-speed 17-bit x
17-bit multiplier, a barrel shifter, and a 40-bit adder/sub-
tracter (with two target accumulators, round and
saturation logic).
The DSP engine also has the capability to perform inher-
ent
require no additional data. These instructions are ADD,
SUB, and NEG.
The DSP engine has various options selected through
various bits in the CPU Core Configuration Register
(CORCON), as listed below:
• Fractional or integer DSP multiply (IF).
• Signed or unsigned DSP multiply (US).
• Conventional or convergent rounding (RND).
• Automatic saturation on/off for ACCA (SATA).
• Automatic saturation on/off for ACCB (SATB).
• Automatic saturation on/off for writes to data
• Accumulator Saturation mode selection
© 2008 Microchip Technology Inc.
memory (SATDW).
(ACCSAT).
Note:
accumulator-to-accumulator
DSP Engine
For CORCON layout, see Table 3-3.
operations,
which
A block diagram of the DSP engine is shown in
Figure 2-2.
TABLE 2-2:
CLR
ED
EDAC
MAC
MAC
MOVSAC
MPY
MPY.N
MSC
Instruction
dsPIC30F2010
DSP INSTRUCTION
SUMMARY
No change in A
A = A + (x – y)
A = A + (x * y)
A = A – x * y
Operation
A = (x – y)
Algebraic
A = A + x
A = – x * y
A = x * y
A = 0
2
2
2
DS70118H-page 15
ACC WB?
Yes
Yes
Yes
Yes
No
No
No
No
No