DSPIC30F2010-30I/SO Microchip Technology, DSPIC30F2010-30I/SO Datasheet - Page 6

• Manufacturer Part Number: DSPIC30F2010-30I/SO
• Description: IC DSPIC MCU/DSP 12K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 20
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification

dsPIC30F2010
2. Module: CPU
DS80451E-page 6
Sequential MAC class instructions, which prefetch
data from Y data space using +4 address
modification, will cause an address error trap. The
trap occurs only when all of the following
conditions are true:
1. Two sequential MAC class instructions (or a
2. Both instructions prefetch data from Y data
3. Neither of the instruction uses an accumulator
Work around
This problem can be avoided using any of the
following methods:
1. Inserting any other instruction between the two
2. Adding an accumulator write back (a dummy
3. Do not use the + = 4 or – = 4 address
4. Do not prefetch data from Y data space.
Affected Silicon Revisions
A0
X
MAC class instruction executed in a REPEAT or
DO loop) that prefetch from Y data space.
space using the + = 4 or – = 4 address
modification.
write back.
MAC class instructions.
write back if needed) to either of the MAC class
instructions.
modification.
A1
X
A2
X
A3
X
A4
X
3. Module: CPU
EXAMPLE 3:
L0:daw.b
L1: ....
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>), when
executed.
Work around
Check the state of the Carry bit prior to executing
the DAW.b instruction. If the Carry bit is already
set, set the Carry bit again after executing the
DAW.b instruction.
application should process the Carry bit during a
BCD addition operation.
Affected Silicon Revisions
.include “p30f6010.inc”
.......
mov.b
mov.b
add.b
bra
daw.b
bset.b
bra
A0
X
A1
X
#0x80, w0
#0x80, w1
w0, w1, w2 ;Perform addition
NC, L0
w2
L1
w2
SR, #C
A2
X
CHECK CARRY BIT BEFORE
DAW.b
© 2010 Microchip Technology Inc.
A3
Example 3
X
;First BCD number
;Second BCD number
;If C set go to L0
;If not,do DAW and
;set the carry bit
;and exit
A4
X
shows how the