ATMEGA169V-8MI Atmel, ATMEGA169V-8MI Datasheet - Page 238
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATMEGA169V-8MI
Manufacturer Part Number
ATMEGA169V-8MI
Description
IC MCU AVR 16K 1.8V 1MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169V-8MI
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA169V-1MI
ATMEGA169V-1MI
ATMEGA169V-1MI
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Scanning the RESET Pin
238
ATmega169/V
Figure 110. General Port Pin Schematic Diagram
The RESET pin accepts 5V active low logic for standard reset operation, and 12V active
high logic for High Voltage Parallel programming. An observe-only cell as shown in Fig-
ure 111 is inserted both for the 5V reset signal; RSTT, and the 12V reset signal;
RSTHV.
Figure 111. Observe-only Cell
See Boundary-scan
Description for Details!
Pxn
From System Pin
PUD:
PUExn:
OCxn:
ODxn:
IDxn:
SLEEP:
IDxn
PULLUP DISABLE
PULLUP ENABLE for pin Pxn
OUTPUT CONTROL for pin Pxn
OUTPUT DATA to pin Pxn
INPUT DATA from pin Pxn
SLEEP CONTROL
PUExn
Previous
From
Cell
ShiftDR
0
1
SLEEP
OCxn
ClockDR
ODxn
SYNCHRONIZER
D
L
WDx:
RDx:
WRx:
RRx:
RPx:
WPx:
CLK
Q
Q
D
I/O
FF1
:
Q
D
WRITE DDRx
READ DDRx
WRITE PORTx
READ PORTx REGISTER
READ PORTx PIN
WRITE PINx REGISTER
I/O CLOCK
PINxn
Next
Cell
Q
Q
To
RESET
RESET
PORTxn
Q
Q
Q
Q
DDxn
CLR
CLR
D
D
To System Logic
RRx
CLK
PUD
WDx
RDx
RPx
1
0
I/O
2514P–AVR–07/06
WPx
WRx
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