ATMEGA162L-8MI Atmel, ATMEGA162L-8MI Datasheet - Page 18

• Manufacturer Part Number: ATMEGA162L-8MI
• Description: IC MCU AVR 16K 3V 8MHZ 44-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162L-8MI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN Exposed Pad
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

EEPROM Data Memory
EEPROM Read/Write Access
The EEPROM Address
Register – EEARH and EEARL
18
ATmega162(V/U/L)
The ATmega162 contains 512 bytes of data EEPROM memory. It is organized as a sep-
arate data space, in which single bytes can be read and written. The EEPROM has an
endurance of at least 100,000 write/erase cycles. The access between the EEPROM
and the CPU is described in the following, specifying the EEPROM Address Registers,
the EEPROM Data Register, and the EEPROM Control Register.
“Memory Programming” on page 228 contains a detailed description on EEPROM Pro-
gramming in SPI, JTAG, or Parallel Programming mode.
The EEPROM Access Registers are accessible in the I/O space.
The write access time for the EEPROM is given in Table 1. A selftiming function, how-
ever, lets the user software detect when the next byte can be written. If the user code
contains instructions that write the EEPROM, some precautions must be taken. In
heavily filtered power supplies, V
causes the device for some period of time to run at a voltage lower than specified as
minimum for the clock frequency used. See “Preventing EEPROM Corruption” on page
22. for details on how to avoid problems in these situations.
In order to prevent unintentional EEPROM writes, a specific write procedure must be fol-
lowed. Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is read, the CPU is halted for four clock cycles before the next
instruction is executed. When the EEPROM is written, the CPU is halted for two clock
cycles before the next instruction is executed.
• Bits 15..9 – Res: Reserved Bits
These bits are reserved bits in the ATmega162 and will always read as zero.
• Bits 8..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address
in the 512 bytes EEPROM space. The EEPROM data bytes are addressed linearly
between 0 and 511. The initial value of EEAR is undefined. A proper value must be writ-
ten before the EEPROM may be accessed.
Bit
Read/Write
Initial Value
EEAR7
R/W
15
R
–
7
0
X
EEAR6
R/W
14
R
X
–
6
0
EEAR5
R/W
13
R
X
–
5
0
CC
is likely to rise or fall slowly on Power-up/down. This
EEAR4
R/W
12
R
–
4
0
X
EEAR3
R/W
11
R
X
–
3
0
EEAR2
R/W
10
–
2
R
0
X
EEAR1
R/W
R
9
–
1
0
X
EEAR8
EEAR0
R/W
R/W
X
X
8
0
2513C–AVR–09/02
EEARH
EEARL