ATMEGA162-16PC Atmel, ATMEGA162-16PC Datasheet - Page 230

• Manufacturer Part Number: ATMEGA162-16PC
• Description: IC MCU AVR 16K 5V 16MHZ 40-DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162-16PC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

230
ATmega162(V/U/L)
Table 100. Fuse High Byte
Notes:
Table 101. Fuse Low Byte
Notes:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are
locked if Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the
Lock bits.
Fuse Low Byte
OCDEN
JTAGEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
1. The SPIEN Fuse is not accessible in SPI Serial Programming mode.
2. The default value of BOOTSZ1:0 results in maximum Boot Size. See Table 94 on
3. Never ship a product with the OCDEN Fuse programmed regardless of the setting of
1. The default value of SUT1:0 results in maximum start-up time for the default clock
2. The default setting of CKSEL3:0 results in Internal RC Oscillator @ 8 MHz. See
3. The CKOUT Fuse allow the system clock to be output on PortB 0. See “Clock output
4. See “System Clock Prescaler” on page 39 for details.
(3)
(3)
(4)
page 226 for details.
Lock bits and the JTAGEN Fuse. A programmed OCDEN Fuse enables some parts
of the clock system to be running in all sleep modes. This may increase the power
consumption.
source. See Table 12 on page 37 for details.
Table 5 on page 34 for details.
buffer” on page 39 for details.
Bit no
Bit no
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Description
Enable OCD
Enable JTAG
Enable Serial Program and Data
Downloading
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see Table 94 for
details)
Select Boot Size (see Table 94 for
details)
Select Reset Vector
Description
Divide clock by 8
Clock Output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
Default value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
Default Value
1 (unprogrammed, OCD
disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed,
EEPROM not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
(1)
(2)
(2)
(2)
(1)
(2)
2513C–AVR–09/02
(2)
(2)