ATMEGA162-16PC Atmel, ATMEGA162-16PC Datasheet - Page 192
![IC MCU AVR 16K 5V 16MHZ 40-DIP](/photos/6/70/67049/453-40-dip_sml.jpg)
ATMEGA162-16PC
Manufacturer Part Number
ATMEGA162-16PC
Description
IC MCU AVR 16K 5V 16MHZ 40-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA162-16PC
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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Analog Comparator
Analog Comparator Control
and Status Register – ACSR
192
ATmega162(V/U/L)
The Analog Comparator compares the input values on the positive pin AIN0 and nega-
tive pin AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on
the negative pin AIN1, the Analog Comparator Output, ACO, is set. The comparator’s
output can be set to trigger the Timer/Counter1 Input Capture function. In addition, the
comparator can trigger a separate interrupt, exclusive to the Analog Comparator. The
user can select Interrupt triggering on comparator output rise, fall or toggle. A block dia-
gram of the comparator and its surrounding logic is shown in Figure 82 .
Figure 82. Analog Comparator Block Diagram
Note:
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off.
This bit can be set at any time to turn off the Analog Comparator. This will reduce power
consumption in Active and Idle mode. When changing the ACD bit, the Analog Compar-
ator Interrupt must be disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt
can occur when the bit is changed.
• Bit 6 – ACBG: Analog Comparator Bandgap Select
When this bit is set, a fixed bandgap reference voltage replaces the positive input to the
Analog Comparator. When this bit is cleared, AIN0 is applied to the positive input of the
Analog Comparator. See “Internal Voltage Reference” on page 50.
• Bit 5 – ACO: Analog Comparator Output
The output of the Analog Comparator is synchronized and then directly connected to
ACO. The synchronization introduces a delay of 1 - 2 clock cycles.
• Bit 4 – ACI: Analog Comparator Interrupt Flag
This bit is set by hardware when a comparator output event triggers the interrupt mode
defined by ACIS1 and ACIS0. The Analog Comparator interrupt routine is executed if
Bit
Read/Write
Initial Value
REFERENCE
BANDGAP
1. Refer to Figure 1 on page 2 and Table 32 on page 70 for Analog Comparator pin
placement.
ACBG
ACD
R/W
7
0
ACBG
R/W
6
0
ACO
N/A
R
5
R/W
ACI
4
0
(1)
ACIE
R/W
3
0
ACIC
R/W
2
0
ACIS1
R/W
1
0
ACIS0
R/W
0
0
2513C–AVR–09/02
ACSR
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