PIC16C925/CL Microchip Technology, PIC16C925/CL Datasheet - Page 55

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PIC16C925/CL

Manufacturer Part Number
PIC16C925/CL
Description
IC MCU EPROM 4KX14 LCDDVR 68CLCC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C925/CL

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
EPROM
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-CLCC Window, 68-CERQUAD
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA16XL680 - ADAPTER DEVICE FOR MPLAB-ICEAC164024 - ADAPTER PICSTART PLUS 68PLCCAC164022 - MODULE SKT PROMATEII 68PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
8.0
The CCP (Capture/Compare/PWM) module contains a
16-bit register which can operate as a 16-bit capture
register, as a 16-bit compare register, or as a PWM
master/slave duty cycle register. Table 8-1 shows the
timer resources used by the CCP module.
The Capture/Compare/PWM Register1 (CCPR1) is
comprised of two 8-bit registers: CCPR1L (low byte)
and CCPR1H (high byte). The CCP1CON register con-
trols the operation of CCP1. All three are readable and
writable.
REGISTER 8-1:
2001 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
(CCP) MODULE
bit 7-6
bit 5-4
bit 3-0
CCP1CON REGISTER (ADDRESS 17h)
Unimplemented: Read as '0'
CCP1X:CCP1Y: PWM Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
CCP1M3:CCP1M0: CCP1 Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCP1 module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (bit CCP1IF is set)
1001 = Compare mode, clear output on match (bit CCP1IF is set)
1010 = Compare mode, generate software interrupt-on-match (bit CCP1IF is set, CCP1 pin is
1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1)
11xx = PWM mode
bit 7
Legend:
R = Readable bit
- n = Value at POR
U-0
unaffected)
U-0
CCP1X
R/W-0
Preliminary
W = Writable bit
’1’ = Bit is set
CCP1Y
R/W-0
Register 8-1 shows the CCP1CON register.
For use of the CCP module, refer to the Embedded
Control Handbook, “Using the CCP Modules” (AN594).
TABLE 8-1:
CCP Mode
CCP1M3
Compare
R/W-0
Capture
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
PWM
PIC16C925/926
CCP MODE - TIMER
RESOURCE
CCP1M2
R/W-0
CCP1M1
x = Bit is unknown
Timer Resource
R/W-0
DS39544A-page 53
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0

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