PIC16C925/CL Microchip Technology, PIC16C925/CL Datasheet - Page 129

• Manufacturer Part Number: PIC16C925/CL
• Description: IC MCU EPROM 4KX14 LCDDVR 68CLCC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C925/CL

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: EPROM
• Ram Size: 176 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 68-CLCC Window, 68-CERQUAD
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA16XL680 - ADAPTER DEVICE FOR MPLAB-ICEAC164024 - ADAPTER PICSTART PLUS 68PLCCAC164022 - MODULE SKT PROMATEII 68PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

RETURN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
2001 Microchip Technology Inc.
After Interrupt:
2nd Cycle
1st Cycle
PC =
TOS
Return from Subroutine
[ label ]
None
TOS
None
Return from subroutine. The stack is
POPed and the top of the stack (TOS)
is loaded into the program counter.
This is a two-cycle instruction.
1
2
RETURN
Operation
Decode
Q1
00
No
PC
RETURN
Operation
Operation
0000
Q2
No
No
Operation
Operation
0000
Q3
No
No
Pop from
the Stack
Operation
1000
Preliminary
Q4
No
RLF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
Before Instruction:
After Instruction:
REG1
C
REG1
W
C
PIC16C925/926
=
=
=
=
=
Rotate Left f through Carry
[ label ] RLF
0
d
See description below
C
The contents of register ’f’ are rotated
one bit to the left through the Carry
Flag. If ’d’ is 0, the result is placed in
the W register. If ’d’ is 1, the result is
stored back in register ’f’.
1
1
RLF
Decode
1110 0110
0
1110 0110
1100 1100
1
Q1
00
f
[0,1]
127
C
register
1101
Read
Q2
’f’
REG1,0
DS39544A-page 127
f [,d]
Register f
Process
dfff
data
Q3
destination
Write to
ffff
Q4