PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 93
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PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 93 of 366
- Download datasheet (7Mb)
8.3
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding Data Direction register is TRISC. Setting a
TRISC bit (=1) will make the corresponding PORTC pin
an input (i.e., put the corresponding output driver in a
hi-impedance mode). Clearing a TRISC bit (=0) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
Read-modify-write operations on the LATC register,
read and write the latched output value for PORTC.
PORTC is multiplexed with several peripheral functions
(Table 8-5). PORTC pins have Schmitt Trigger input
buffers.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
FIGURE 8-6:
2000 Microchip Technology Inc.
PORTC, TRISC and LATC Registers
Note: I/O pins have diode protection to V
Peripheral Enable
Peripheral Out Select
Peripheral Data Out
Peripheral Data In
RD PORTC
WR TRISC
WR LATC
or
WR PORTC
Data Bus
PORTC BLOCK DIAGRAM (PERIPHERAL OUTPUT OVERRIDE)
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
Pin
TRIS Latch
Data
D
D
CK
RD TRISC
CK
Latch
Override
RD LATC
Q
Q
Q
Q
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Advanced Information
DD
Peripheral
Timer1 OSC for Timer1/Timer3
Timer1 OSC for Timer1/Timer3
—
SPI/I
I
SPI Data Out
USART Async Xmit, Sync Clock
USART Sync Data Out
2
and V
C Data Out
TRIS OVERRIDE
2
C Master Clock
SS
Override
TRIS
.
0
1
Q
put, while other peripherals override the TRIS bit to make
a pin an input. The user should refer to the correspond-
ing peripheral section for the correct TRIS bit settings.
The pin override value is not loaded into the TRIS reg-
ister. This allows read-modify-write of the TRIS register,
without concern due to peripheral overrides.
EXAMPLE 8-3:
CLRF
CLRF
MOVLW
MOVWF
EN
D
PORTC
LATC
0xCF
TRISC
Schmitt
Trigger
V
V
N
P
SS
DD
INITIALIZING PORTC
; Initialize PORTC by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RC3:RC0 as inputs
; RC5:RC4 as outputs
; RC7:RC6 as inputs
PIC18CXX8
DS30475A-page 93
I/O Pin
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