PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 282
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 282 of 366
- Download datasheet (7Mb)
PIC18CXX8
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (k<7:0>)
2nd word(k<19:8>)
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS30475A-page 282
After Instruction
operation
Decode
No
PC =
Q1
Read literal
Address (THERE)
operation
’k’<7:0>,
Unconditional Branch
[ label ]
0
k
None
GOTO allows an unconditional
branch anywhere within entire 2M
byte memory range. The 20-bit
value ’k’ is loaded into PC<20:1>.
GOTO is always a two-cycle
instruction.
2
2
GOTO THERE
1110
1111
No
Q2
k
PC<20:1>
1048575
GOTO k
k
1111
19
operation
operation
kkk
No
No
Q3
k
kkkk
7
kkk
Advanced Information
Read literal
Write to PC
’k’<19:8>,
operation
No
Q4
kkkk
kkkk
0
8
INCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
CNT
Z
C
DC
CNT
Z
C
DC
Q1
=
=
=
=
=
=
=
=
register ’f’
Increment f
[ label ]
0
d
a
(f) + 1
The contents of register ’f’ are
incremented. If ’d’ is 0, the result is
placed in WREG. If ’d’ is 1, the
result is placed back in register ’f’
(default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, the Bank
will be selected as per the BSR
value.
1
1
INCF
C,DC,N,OV,Z
Read
0010
Q2
0xFF
0
?
?
0x00
1
1
1
f
[0,1]
[0,1]
2000 Microchip Technology Inc.
255
dest
INCF f [ ,d [,a] ]
10da
CNT
Process
Data
Q3
ffff
destination
Write to
Q4
ffff
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