PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 357
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PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 357 of 366
- Download datasheet (7Mb)
PORTJ
PORTJ Block Diagram ..................................................... 106
PORTK
Postscaler, WDT
Power-down Mode. See SLEEP
Power-on Reset (POR) .............................................. 30, 251
Prescaler, Capture ........................................................... 129
Prescaler, Timer0 ............................................................. 115
Prescaler, Timer1 ............................................................. 118
Prescaler, Timer2 ............................................................. 132
PRO MAT“ II Universal Programmer ............................... 307
Program Counter
Program Memory ............................................................... 41
Program Verification ........................................................ 259
Programmable ................................................................. 251
Programming Time Segments ......................................... 222
Programming, Device Instructions ................................... 261
Propagation Segment ...................................................... 219
PSPCON Register
PWM (CCP Module) ........................................................ 132
Q
Q-Clock ............................................................................ 132
R
RAM. See Data Memory
RCSTA Register
Receive Buffers ................................................................ 213
Receive Buffers Diagram ................................................. 214
Receive Interrupt .............................................................. 225
Receive Message Buffering ............................................. 213
Receiver Error Passive .................................................... 226
Receiver Overrun ............................................................. 226
Receiver Warning ............................................................ 226
Register File ....................................................................... 48
2000 Microchip Technology Inc.
Initialization .............................................................. 106
PORTJ ..................................................................... 106
TRISJ ....................................................................... 106
Initialization .............................................................. 108
PORTK ..................................................................... 108
TRISK ...................................................................... 108
Assignment (PSA Bit) .............................................. 115
Rate Select (PS2:PS0 Bits) ..................................... 115
Switching Between Timer0 and WDT ...................... 115
Oscillator Start-up Timer (OST) ......................... 30, 251
Power-up Timer (PWRT) ................................... 30, 251
Time-out Sequence .................................................... 31
Time-out Sequence on Power-up ........................ 32, 33
Timing Diagram ........................................................ 325
Assignment (PSA Bit) .............................................. 115
Rate Select (PS2:PS0 Bits) ..................................... 115
Switching Between Timer0 and WDT ...................... 115
PCL Register .............................................................. 45
PCLATH Register ...................................................... 45
PSPMODE Bit .................................................... 95, 109
Block Diagram .......................................................... 132
CCPR1H:CCPR1L Registers ................................... 132
Duty Cycle ................................................................ 132
Example Frequencies/Resolutions .......................... 133
Output Diagram ........................................................ 132
Period ....................................................................... 132
Setup for PWM Operation ........................................ 133
TMR2 to PR2 Match ........................................ 121, 132
SPEN Bit .................................................................. 167
Advanced Information
Registers
RESET ....................................................................... 29, 251
Resynchronization ........................................................... 220
RETFIE .................................................................... 291, 292
RETLW ............................................................................ 292
RETURN .......................................................................... 293
Revision History ............................................................... 349
RLCF ............................................................................... 293
RLNCF ............................................................................. 294
RRCF ............................................................................... 294
RRNCF ............................................................................ 295
S
Sample Point ................................................................... 219
SCI. See USART
SCK ................................................................................. 141
SDI ................................................................................... 141
SDO ................................................................................. 141
Serial Clock, SCK ............................................................ 141
Serial Communication Interface. See USART
Serial Data In, SDI ........................................................... 141
Serial Data Out, SDO ...................................................... 141
Serial Peripheral Interface. See SPI
Shortening a Bit Period .................................................... 221
Simplified Block Diagram of On-Chip Reset Circuit ........... 29
Slave Select Synchronization .......................................... 144
Slave Select, SS .............................................................. 141
SLEEP ............................................................. 251, 257, 296
Software Simulator (MPLAB-SIM) ................................... 306
Special Event Trigger. See Compare
Special Features of the CPU ................................... 247, 251
Special Function Registers ................................................ 48
SPI
SPI Module
SS .................................................................................... 141
SSP ................................................................................. 135
SSP Module
SSPCON1 ....................................................................... 138
SSPCON2 ....................................................................... 140
SSPSTAT ................................................................ 136
T3CON
Timing Diagram ....................................................... 325
Master Mode ............................................................ 143
Serial Clock ............................................................. 141
Serial Data In ........................................................... 141
Serial Data Out ........................................................ 141
Slave Select ............................................................. 141
SPI Clock ................................................................. 143
SPI Mode ................................................................. 141
Slave Mode .............................................................. 144
Slave Select Synchronization .................................. 144
Slave Synch Timing ................................................. 144
Slave Timing with CKE = 0 ...................................... 145
Slave Timing with CKE = 1 ...................................... 145
Block Diagram (SPI Mode) ...................................... 141
I
SPI Mode ................................................................. 141
SPI Mode. See SPI
SSPBUF .................................................................. 143
SSPCON1 ............................................................... 138
SSPCON2 ............................................................... 140
SSPSR .................................................................... 143
SSPSTAT ................................................................ 136
TMR2 Output for Clock Shift ............................ 121, 122
SPI Master Mode ..................................................... 143
SPI Slave Mode ....................................................... 144
2
C Mode. See I
Diagram ........................................................... 123
Section ............................................................ 123
2
C
PIC18CXX8
DS30475A-page 357
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