PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 38
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 38 of 366
- Download datasheet (7Mb)
PIC18CXX8
TABLE 3-3:
DS30475A-page 38
CANCON
CANSTAT
RXB0D7
RXB0D6
RXB0D5
RXB0D4
RXB0D3
RXB0D2
RXB0D1
RXB0D0
RXB0DLC
RXB0EIDL
RXB0EIDH
RXB0SIDL
RXB0SIDH
RXB0CON
RXB1D7
RXB1D6
RXB1D5
RXB1D4
RXB1D3
RXB1D2
RXB1D1
RXB1D0
RXB1DLC
RXB1EIDL
RXB1EIDH
RXB1SIDL
RXB1SIDH
RXB1CON
TXB0D7
TXB0D6
TXB0D5
TXB0D4
TXB0D3
TXB0D2
TXB0D1
Legend: u = unchanged,
Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
Register
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
4: See Table 3-2 for RESET value for specific condition.
5: Bit 6 of PORTA, LATA, and TRISA are enabled in ECIO and RCIO oscillator modes only. In all other
6: The long write enable is only reset on a POR or MCLR.
7: Available on PIC18C858 only.
vector (0008h or 0018h).
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
oscillator modes, they are disabled and read ’0’.
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
658
Applicable
Devices
x = unknown,
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
858
Brown-out Reset
Power-on Reset,
Advanced Information
xxxx xxx-
xxx- xxx-
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
0xxx xxxx
xxxx xxxx
xxxx xxxx
xxxx x-xx
xxxx xxxx
000- 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
0xxx xxxx
xxxx xxxx
xxxx xxxx
xxxx x0xx
xxxx xxxx
0000 0000
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
- = unimplemented bit, read as ’0’, q = value depends on condition
RESET Instruction
Stack Resets
MCLR Reset
uuuu uuu-
uuu- uuu-
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu u-uu
uuuu uuuu
000- 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0uuu uuuu
uuuu uuuu
uuuu uuuu
uuuu u0uu
uuuu uuuu
0000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
WDT Reset
2000 Microchip Technology Inc.
Wake-up via WDT
or Interrupt
uuuu uuu-
uuu- uuu-
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
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uuuu u-uu
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uuu- uuuu
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uuuu uuuu
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