SAF-TC1167-128F133HL AD Infineon Technologies, SAF-TC1167-128F133HL AD Datasheet - Page 99

• Manufacturer Part Number: SAF-TC1167-128F133HL AD
• Description: IC MCU 32BIT FLASH 176-LQFP
• Manufacturer: Infineon Technologies
• Series: TC116xr

Specifications of SAF-TC1167-128F133HL AD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: ASC, CAN, EBI/EMI, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 88
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 32x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFQFP
• Data Bus Width: 32 bit
• Data Ram Size: 104 KB
• Interface Type: ASC, MLI, MSC, SSC
• Maximum Clock Frequency: 133 MHz
• Number Of Programmable I/os: 88
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (12 bit, 16 Channel) / 10 bit, 4 Channel
• Packages: PG-LQFP-176
• Max Clock Frequency: 133.0 MHz
• Sram (incl. Cache): 128.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 36
• Program Memory: 1.0 MB
• For Use With: B158-H8690-X-0-7600IN - KIT STARTER TC116X SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000602800

Table 13
Parameter
Conversion time
Converter clock
Input resistance of
the analog voltage
path (Rn, Rp)
Channel amplifier
cutoff frequency
Settling time of a
channel amplifier
(after changing
channel amplifier
input)
1) Calibration should be performed at each power-up. In case of continuous operation, calibration should be
2) The offset error voltage drifts over the whole temperature range maximum ±6 LSB.
3) Applies when the gain of the channel equals one. For the other gain settings, the offset error increases; it must
4) Voltage overshoots up to 4 V are permissible, provided the pulse duration is less than 100 μs and the
5) Voltage overshoots up to 1.7 V are permissible, provided the pulse duration is less than 100 μs and the
6) A running conversion may become inexact in case of violating the normal operating conditions (voltage
7) Current peaks of up to 40 mA with a duration of max. 2 ns may occur
8) This value applies in power-down mode.
9) Not subject to production test, verified by design / characterization.
The calibration procedure should run after each power-up, when all power supply
voltages and the reference voltage have stabilized.
Data Sheet
performed minimum once per week, or on regular basis in order to compensate for temperature changes.
be multiplied with the applied gain.
cumulated summary of the pulses does not exceed 1 h.
cumulated sum of the pulses does not exceed 1 h.
overshoots).
9)
FADC Characteristics (Operating Conditions apply) (cont’d)
9)
Symbol
t
f
R
f
t
C_FADC
FADC
COFF
SET
FAIN
CC
CC
SR 10
CC –
CC –
Min.
100
2
94
Values
Typ. Max.
–
–
–
–
–
21
80
200
–
5
Unit
CLK
of
f
MHz
kΩ
MHz
μs
FADC
Electrical Parameters
Note /
Test Condition
For 10-bit conv.
–
9)
–
–
V1.3, 2009-10
TC1167