SAF-TC1130-L150EB-G BB Infineon Technologies, SAF-TC1130-L150EB-G BB Datasheet - Page 100

• Manufacturer Part Number: SAF-TC1130-L150EB-G BB
• Description: IC MCU 32BIT TRICOR 16KB LBGA208
• Manufacturer: Infineon Technologies
• Series: TC11xxr

Specifications of SAF-TC1130-L150EB-G BB

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Type: ROMless
• Ram Size: 144K x 8
• Voltage - Supply (vcc/vdd): 1.43 V ~ 1.58 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LSBGA
• Data Bus Width: 32 bit
• Program Memory Size: 32 KB
• Data Ram Size: 144 KB
• Interface Type: 3xASC, 2xSSC, I2C, 2xMLI, Ethernet 10, 100 Mbits, s, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 9
• Operating Supply Voltage: 1.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Packages: PG-LBGA-208
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 144.0 KByte
• Can Nodes: 4
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: FT1130L150EBGBBXP; SAF-TC1130-L150EB-GBB; SAF-TC1130-L150EB-GBBINTR; SAF-TC1130-L150EB-GBBTR; SAF-TC1130-L150EB-GBBTR; SAFTC1130L150EBBBXT; SP000106119; SP000106538; SP000743584

Figure 4-10 EBU Clock Output Timing
4.3.8.3
(Operating Conditions apply; C
Parameter
SDCLKO period
CKE output valid time from SDCLKO
CKE output hold time from SDCLKO
Address output valid time from SDCLKO
Address output hold time from SDCLKO
CSx, RAS, CAS, RD/WR, BC(3:0) output
valid time from SDCLKO
CSx, RAS, CAS, RD/WR, BC(3:0) output
hold time from SDCLKO
AD(31:0) output valid time from SDCLKO
AD(31:0) output hold time from SDCLKO
AD(31:0) input setup time to SDCLKO
AD(31:0) input hold time from SDCLKO
1) If application conditions other than 50 pf capacitive load are used, then the proper correlation factor should be
2) The parameters are applicable for PC100 SDRAM access and the maximum SDCLKO is up to 100 MHz.
3) The parameters are applicable for PC133 SDRAM access and the maximum SDCLKO is up to 120 MHz.
Data Sheet
BFCLKO /
used for your specific application condition. For design team, the load should be set according to the system
requirement.
SDCLKO
Timing for SDRAM Access Signals
0.5 V
DD
L
= 50 pF
t
2
t
1
1)
)
94
t
3
Symbol
t
t
t
t
t
t
t
t
t
t
t
1
1
2
3
4
5
6
7
8
9
10
CC
CC
CC
CC
CC
CC
CC
CC
CC
SR
SR
10
−
0
−
1.0
−
1.0
−
1.0
4.0
3.0
min max min max
Limits
t
5
–
8.0
−
8.0
−
8.0
−
8.0
−
−
−
Electrical Parameters
2)
8.3
−
0.8
−
0.8
−
0.8
−
0.8
2.9
3.0
Limits
V1.1, 2008-12
–
6.8
−
6.8
−
6.8
−
6.8
−
−
−
3)
TC1130
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns