SAK-TC1736-128F80HL AA Infineon Technologies, SAK-TC1736-128F80HL AA Datasheet - Page 4
SAK-TC1736-128F80HL AA
Manufacturer Part Number
SAK-TC1736-128F80HL AA
Description
IC MCU 32BIT 1MB FLASH 144LQFP
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet
1.SAK-TC1736-128F80HL_AA.pdf
(123 pages)
Specifications of SAK-TC1736-128F80HL AA
Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
70
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LFQFP
Packages
PG-LQFP-144
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
48.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
24
Program Memory
1.0 MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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TC1736 Data Sheet
Revision History: V1.1, 2009-08
Previous Version: V1.0
Page
Page 5-95
Page 5-115
Page 5-116
Previous Version: V0.2
Page 2-25
Page 3-56
Page 3-56
Page 5-82
Page 5-85
Page 5-93
Page 5-95
Page 5-101
Page 5-102
Page 5-103
Trademarks
TriCore® is a trademark of Infineon Technologies AG.
Data Sheet
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send your proposal (including a reference to this document) to:
mcdocu.comments@infineon.com
Subjects (major changes since last revision)
I
The thermal resistance values are updated, the method used for the
specified thermal resistances is included.
The package name is corrected.
Text which describes the endurance of PFlash and DFlash is enhanced.
Input spike-filter info is added to PORST.
A footnote is added to
The spike-filters parameters are included,
The maximum limit for
The temperature sensor measurement time parameter is added.
I
The condition for HWCFG is deleted from hold time from PORST rising
edge.
The power, pad, reset timing figure is updated.
The notes under the PLL sections are updated.
DD
DD
for 40 MHz variant and the test condition is updated.
for 40 MHz variant is added.
V
I
OZ1
DDMF
is updated.
.
t
SF1
,
t
SF2
.
V1.1, 2009-08
TC1736
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