SAK-XE167FM-72F80L AA Infineon Technologies, SAK-XE167FM-72F80L AA Datasheet - Page 56
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SAK-XE167FM-72F80L AA
Manufacturer Part Number
SAK-XE167FM-72F80L AA
Description
IC MCU 16BIT FLASH 144-LQFP
Manufacturer
Infineon Technologies
Series
XE16xr
Datasheet
1.SAF-XE167KM-48F80L_AA.pdf
(140 pages)
Specifications of SAK-XE167FM-72F80L AA
Core Processor
C166SV2
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
576KB (576K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LFQFP
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, UART, SPI, I2S
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
119
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
SP000628636
3.4
The XE167xM’s Memory Protection Unit (MPU) protects user-specified memory areas
from unauthorized read, write, or instruction fetch accesses. The MPU can protect the
whole address space including the peripheral area. This completes establisched
mechanisms such as the register security mechanism or stack overrun/underrun
detection.
Four Protection Levels support flexible system programming where operating system,
low level drivers, and applications run on separate levels. Each protection level permits
different access restrictions for instructions and/or data.
Every access is checked (if the MPU is enabled) and an access violating the permission
rules will be marked as invalid and leads to a protection trap.
A set of protection registers for each protection level specifies the address ranges and
the access permissions. Applications requiring more than 4 protection levels can
dynamically re-program the protection registers.
3.5
The XE167xM’s Memory Checker Module calculates a checksum (fractional polynomial
division) on a block of data, often called Cyclic Redundancy Code (CRC). It is based on
a 32-bit linear feedback shift register and may, therefore, also be used to generate
pseudo-random numbers.
The Memory Checker Module is a 16-bit parallel input signature compression circuitry
which enables error detection within a block of data stored in memory, registers, or
communicated e.g. via serial communication lines. It reduces the probability of error
masking due to repeated error patterns by calculating the signature of blocks of data.
The polynomial used for operation is configurable, so most of the commonly used
polynomials may be used. Also, the block size for generating a CRC result is
configurable via a local counter. An interrupt may be generated if testing the current data
block reveals an error.
An autonomous CRC compare circuitry is included to enable redundant error detection,
e.g. to enable higher safety integrity levels.
The Memory Checker Module provides enhanced fault detection (beyond parity or ECC)
for data and instructions in volatile and non volatile memories. This is especially
important for the safety and reliability of embedded systems.
Data Sheet
Memory Protection Unit (MPU)
Memory Checker Module (MCHK)
XE167FM, XE167GM, XE167HM, XE167KM
56
XE166 Family Derivatives / Base Line
Functional Description
V2.0, 2009-03