SAK-XE167FM-72F80L AA Infineon Technologies, SAK-XE167FM-72F80L AA Datasheet - Page 15
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SAK-XE167FM-72F80L AA
Manufacturer Part Number
SAK-XE167FM-72F80L AA
Description
IC MCU 16BIT FLASH 144-LQFP
Manufacturer
Infineon Technologies
Series
XE16xr
Datasheet
1.SAF-XE167KM-48F80L_AA.pdf
(140 pages)
Specifications of SAK-XE167FM-72F80L AA
Core Processor
C166SV2
Core Size
16-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
576KB (576K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
144-LFQFP
Data Bus Width
16 bit
Data Ram Size
32 KB
Interface Type
CAN, UART, SPI, I2S
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
119
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 24 Channel)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
SP000628636
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Table 4
Pin
6
7
8
9
Data Sheet
Symbol
TRST
P8.3
CCU60_COU
T60
CCU62_CC6
0
TDI_D
CCU62_CC6
0INB
P7.0
T3OUT
T6OUT
TDO_A
ESR2_1
RxDC4B
P7.3
EMUX1
U0C1_DOUT O2
U0C0_DOUT O3
CCU62_CCP
OS1A
TMS_C
U0C1_DX0F
Pin Definitions and Functions (cont’d)
Ctrl.
I
O0 / I St/B
O1
O2
I
I
O0 / I St/B
O1
O2
OH / I St/B
I
I
O0 / I St/B
O1
I
I
I
Type Function
In/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
Test-System Reset Input
For normal system operation, pin TRST should be
held low. A high level at this pin at the rising edge
of PORST activates the XE167xM’s debug
system. In this case, pin TRST must be driven low
once to reset the debug system.
An internal pulldown device will hold this pin low
when nothing is driving it.
Bit 3 of Port 8, General Purpose Input/Output
CCU60 Channel 0 Output
CCU62 Channel 0 Output
JTAG Test Data Input
CCU62 Channel 0 Input
Bit 0 of Port 7, General Purpose Input/Output
GPT12E Timer T3 Toggle Latch Output
GPT12E Timer T6 Toggle Latch Output
JTAG Test Data Output / DAP1 Input/Output
ESR2 Trigger Input 1
CAN Node 4 Receive Data Input
Bit 3 of Port 7, General Purpose Input/Output
External Analog MUX Control Output 1 (ADC1)
USIC0 Channel 1 Shift Data Output
USIC0 Channel 0 Shift Data Output
CCU62 Position Input 1
JTAG Test Mode Selection Input
USIC0 Channel 1 Shift Data Input
XE167FM, XE167GM, XE167HM, XE167KM
15
XE166 Family Derivatives / Base Line
General Device Information
V2.0, 2009-03
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